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database support for VME-300 cards and optimization of selection records #164

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hongran
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@hongran hongran commented Jun 13, 2024

1: Added substitution files for the EVM-VME-300 and EVR-VME-300
2: Because the VME boards support rear transition boards, it has more I/O options. I expanded the selection records for dbus, trigEvt and Pps Selection. I have a mechanism to prevent selecting from multiple sources. If one is selected, the others are changed automatically to "OFF"

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hongran commented Jun 13, 2024

I am not sure why the failed check happened. In my fork, the same check was successful.

@@ -157,9 +157,29 @@ record(mbbiDirect, "$(P)PpsInp-MbbiDir_") {
field(ASG, "private")
field(DESC, "EVG Pps Input")
field(INP, "$(P)PpsInp-Sel.RVAL NPP")
field(FLNK, "$(P)PpsInp-SQ_")
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I think a race condition exists here.

For example, currently PpsInp2 is used and one want to set PpsInp,
the logic here is to first set PpsInp, then clear PpsInp1 and PpsInp2.
During this short period, there are still two Pps sources enabled.

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You are right about the order of record processing. If it is better to have a short period with no source selected rather than 2 sources are selected, I can change my code in the following way.

  • Let the TrigSrcN-Sel FLNK field be the seq, not the MbbiDir_.
  • In the seq record, after the other sources are switched off, write to the PROC field of the MbbiDir_ to process it and make the new setting effective.

Does this sound good to you?

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@hongran , could you split this MR in 2 ? one for the substitution files and another for the selection of records ?

@gabrielfedel gabrielfedel self-assigned this Jun 18, 2024
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hongran commented Jun 18, 2024

@hongran , could you split this MR in 2 ? one for the substitution files and another for the selection of records ?

Yes, I will.
According to the history of how I made commits, it is better to close this PR and start a new one with the substitution files only.

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hongran commented Jun 18, 2024

This will be replaced by 2 separate MRs.

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Include a mechanism to avoid PpsInp-Sel and PpsInp1-Sel to be set at the same time
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