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feat: Evr reginfo update #185

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merged 4 commits into from
Oct 1, 2024
+201 −31
Merged

feat: Evr reginfo update #185

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4c2d441
feat: Update of EVR REGINFO.
jerzyjamroz Oct 1, 2024
57c5c0f
feat: Upgrade of the "printregisters" EVR function.
jerzyjamroz Oct 1, 2024
eb81d5e
fix: Print 16 bit registers as it is.
jerzyjamroz Oct 1, 2024
f12fe8f
feat: Upgrade of the "printregisters" EVG function.
jerzyjamroz Oct 1, 2024
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21 changes: 15 additions & 6 deletions evgMrmApp/src/evgInit.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -840,16 +840,25 @@ printregisters(volatile epicsUInt8 *evg) {
for(reg=0; reg<NELEMENTS(printreg); reg++){
switch(printreg[reg].rsize){
case 8:
printf("%16s: %02x\n", printreg[reg].label,
ioread8(evg+printreg[reg].offset));
printf("0x%05x %02x %-16s\n",
printreg[reg].offset,
ioread8(evg+printreg[reg].offset),
printreg[reg].label
);
break;
case 16:
printf("%16s: %04x\n", printreg[reg].label,
nat_ioread16(evg+printreg[reg].offset));
printf("0x%05x %04x %-16s\n",
printreg[reg].offset,
nat_ioread16(evg+printreg[reg].offset),
printreg[reg].label
);
break;
case 32:
printf("%16s: %08x\n", printreg[reg].label,
nat_ioread32(evg+printreg[reg].offset));
printf("0x%05x %08x %-16s\n",
printreg[reg].offset,
nat_ioread32(evg+printreg[reg].offset),
printreg[reg].label
);
break;
}
}
Expand Down
2 changes: 1 addition & 1 deletion evgMrmApp/src/evgRegMap.h
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Original file line number Diff line number Diff line change
Expand Up @@ -214,7 +214,7 @@
//=====================
// Backplane Output Mapping Register Array
//
#define U16_BackOutMap_base 0x0424 // Backplane Output Port Mapping Register Offset
#define U16_BackOutMap_base 0x0420 // Backplane Output Port Mapping Register Offset
#define U16_BackOutMap(n) (U16_BackOutMap_base + (2*(n)))

//=====================
Expand Down
206 changes: 182 additions & 24 deletions evrMrmApp/src/drvemSetup.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -309,7 +309,7 @@ struct printreg
int rsize;
} printreg[] = {
#define REGINFO(label, name, size) {label, U##size##_##name, size}
REGINFO("Version", FWVersion, 32),
REGINFO("FWVersion", FWVersion, 32),
REGINFO("Control", Control, 32),
REGINFO("Status", Status, 32),
REGINFO("IRQ Flag",IRQFlag, 32),
Expand All @@ -327,26 +327,178 @@ REGINFO("TSEvt",TSEvt, 32),
REGINFO("TSSecLath",TSSecLatch, 32),
REGINFO("TSEvtLath",TSEvtLatch, 32),
REGINFO("FracDiv", FracDiv, 32),
REGINFO("RFInitPhas",RFInitPhas, 32),

REGINFO("GPIODir",GPIODir, 32),
REGINFO("GPIOIn",GPIOIn, 32),
REGINFO("GPIOOut",GPIOOut, 32),

REGINFO("DCTarget",DCTarget, 32),
REGINFO("DCRxVal",DCRxVal, 32),
REGINFO("DCIntVal",DCIntVal, 32),
REGINFO("DCStatus",DCStatus, 32),
REGINFO("TOPID",TOPID, 32),

REGINFO("SeqControl0",SeqControl(0), 32),
REGINFO("SeqControl1",SeqControl(1), 32),

REGINFO("Scaler0",Scaler(0),32),
REGINFO("Scaler1",Scaler(1),32),
REGINFO("Scaler2",Scaler(2),32),
REGINFO("Scaler3",Scaler(3),32),
REGINFO("Scaler4",Scaler(4),32),
REGINFO("Scaler5",Scaler(5),32),
REGINFO("Scaler6",Scaler(6),32),
REGINFO("Scaler7",Scaler(7),32),

REGINFO("DBusPulsTrig0",DBusPulsTrig(0),32),
REGINFO("DBusPulsTrig1",DBusPulsTrig(1),32),
REGINFO("DBusPulsTrig2",DBusPulsTrig(2),32),
REGINFO("DBusPulsTrig3",DBusPulsTrig(3),32),
REGINFO("DBusPulsTrig4",DBusPulsTrig(4),32),
REGINFO("DBusPulsTrig5",DBusPulsTrig(5),32),
REGINFO("DBusPulsTrig6",DBusPulsTrig(6),32),
REGINFO("DBusPulsTrig7",DBusPulsTrig(7),32),

REGINFO("Pul0Ctrl",PulserCtrl(0),32),
REGINFO("Pul0Scal",PulserScal(0),32),
REGINFO("Pul0Dely",PulserDely(0),32),
REGINFO("Pul0Wdth",PulserWdth(0),32),
REGINFO("FP01MAP",OutputMapFP(0),32),
REGINFO("FPU01MAP",OutputMapFPUniv(0),32),
REGINFO("RB01MAP",OutputMapRB(0),32),
REGINFO("FPIN0",InputMapFP(0),32),
REGINFO("CML4Low",OutputCMLLow(0),32),
REGINFO("CML4Rise",OutputCMLRise(0),32),
REGINFO("CML4High",OutputCMLHigh(0),32),
REGINFO("CML4Fall",OutputCMLFall(0),32),
REGINFO("CML4Ena",OutputCMLEna(0),32),
REGINFO("CML4Cnt",OutputCMLCount(0),32),
REGINFO("CML4Len",OutputCMLPatLength(0),32),
REGINFO("CML4Pat0",OutputCMLPat(0,0),32),
REGINFO("CML4Pat1",OutputCMLPat(0,1),32),

REGINFO("Pul1Ctrl",PulserCtrl(1),32),
REGINFO("Pul1Scal",PulserScal(1),32),
REGINFO("Pul1Dely",PulserDely(1),32),
REGINFO("Pul1Wdth",PulserWdth(1),32),

REGINFO("Pul2Ctrl",PulserCtrl(2),32),
REGINFO("Pul2Scal",PulserScal(2),32),
REGINFO("Pul2Dely",PulserDely(2),32),
REGINFO("Pul2Wdth",PulserWdth(2),32),

REGINFO("Pul3Ctrl",PulserCtrl(3),32),
REGINFO("Pul3Scal",PulserScal(3),32),
REGINFO("Pul3Dely",PulserDely(3),32),
REGINFO("Pul3Wdth",PulserWdth(3),32),

REGINFO("Pul4Ctrl",PulserCtrl(4),32),
REGINFO("Pul4Scal",PulserScal(4),32),
REGINFO("Pul4Dely",PulserDely(4),32),
REGINFO("Pul4Wdth",PulserWdth(4),32),

REGINFO("Pul5Ctrl",PulserCtrl(5),32),
REGINFO("Pul5Scal",PulserScal(5),32),
REGINFO("Pul5Dely",PulserDely(5),32),
REGINFO("Pul5Wdth",PulserWdth(5),32),

REGINFO("Pul6Ctrl",PulserCtrl(6),32),
REGINFO("Pul6Scal",PulserScal(6),32),
REGINFO("Pul6Dely",PulserDely(6),32),
REGINFO("Pul6Wdth",PulserWdth(6),32),

REGINFO("Pul7Ctrl",PulserCtrl(7),32),
REGINFO("Pul7Scal",PulserScal(7),32),
REGINFO("Pul7Dely",PulserDely(7),32),
REGINFO("Pul7Wdth",PulserWdth(7),32),

REGINFO("OutMapFP0",REG(U32_OutputMapFPN,0),16),
REGINFO("OutMapFP1",REG(U32_OutputMapFPN,1),16),
REGINFO("OutMapFP2",REG(U32_OutputMapFPN,2),16),
REGINFO("OutMapFP3",REG(U32_OutputMapFPN,3),16),
REGINFO("OutMapFP4",REG(U32_OutputMapFPN,4),16),
REGINFO("OutMapFP5",REG(U32_OutputMapFPN,5),16),
REGINFO("OutMapFP6",REG(U32_OutputMapFPN,6),16),
REGINFO("OutMapFP7",REG(U32_OutputMapFPN,7),16),

REGINFO("OutMapFPUniv0",REG(U32_OutputMapFPUnivN,0),16),
REGINFO("OutMapFPUniv1",REG(U32_OutputMapFPUnivN,1),16),
REGINFO("OutMapFPUniv2",REG(U32_OutputMapFPUnivN,2),16),
REGINFO("OutMapFPUniv3",REG(U32_OutputMapFPUnivN,3),16),
REGINFO("OutMapFPUniv4",REG(U32_OutputMapFPUnivN,4),16),
REGINFO("OutMapFPUniv5",REG(U32_OutputMapFPUnivN,5),16),
REGINFO("OutMapFPUniv6",REG(U32_OutputMapFPUnivN,6),16),
REGINFO("OutMapFPUniv7",REG(U32_OutputMapFPUnivN,7),16),
REGINFO("OutMapFPUniv8",REG(U32_OutputMapFPUnivN,8),16),
REGINFO("OutMapFPUniv9",REG(U32_OutputMapFPUnivN,9),16),
REGINFO("OutMapFPUniv10",REG(U32_OutputMapFPUnivN,10),16),
REGINFO("OutMapFPUniv11",REG(U32_OutputMapFPUnivN,11),16),
REGINFO("OutMapFPUniv12",REG(U32_OutputMapFPUnivN,12),16),
REGINFO("OutMapFPUniv13",REG(U32_OutputMapFPUnivN,13),16),
REGINFO("OutMapFPUniv14",REG(U32_OutputMapFPUnivN,14),16),
REGINFO("OutMapFPUniv15",REG(U32_OutputMapFPUnivN,15),16),

REGINFO("OutMapRear0",REG(U32_OutputMapRBN,0),16),
REGINFO("OutMapRear1",REG(U32_OutputMapRBN,1),16),
REGINFO("OutMapRear2",REG(U32_OutputMapRBN,2),16),
REGINFO("OutMapRear3",REG(U32_OutputMapRBN,3),16),
REGINFO("OutMapRear4",REG(U32_OutputMapRBN,4),16),
REGINFO("OutMapRear5",REG(U32_OutputMapRBN,5),16),
REGINFO("OutMapRear6",REG(U32_OutputMapRBN,6),16),
REGINFO("OutMapRear7",REG(U32_OutputMapRBN,7),16),
REGINFO("OutMapRear8",REG(U32_OutputMapRBN,8),16),
REGINFO("OutMapRear9",REG(U32_OutputMapRBN,9),16),
REGINFO("OutMapRear10",REG(U32_OutputMapRBN,10),16),
REGINFO("OutMapRear11",REG(U32_OutputMapRBN,11),16),
REGINFO("OutMapRear12",REG(U32_OutputMapRBN,12),16),
REGINFO("OutMapRear13",REG(U32_OutputMapRBN,13),16),
REGINFO("OutMapRear14",REG(U32_OutputMapRBN,14),16),
REGINFO("OutMapRear15",REG(U32_OutputMapRBN,15),16),

REGINFO("OutMapBackplane0",REG(U32_OutputMapBackplaneN,0),16),
REGINFO("OutMapBackplane1",REG(U32_OutputMapBackplaneN,1),16),
REGINFO("OutMapBackplane2",REG(U32_OutputMapBackplaneN,2),16),
REGINFO("OutMapBackplane3",REG(U32_OutputMapBackplaneN,3),16),
REGINFO("OutMapBackplane4",REG(U32_OutputMapBackplaneN,4),16),
REGINFO("OutMapBackplane5",REG(U32_OutputMapBackplaneN,5),16),
REGINFO("OutMapBackplane6",REG(U32_OutputMapBackplaneN,6),16),
REGINFO("OutMapBackplane7",REG(U32_OutputMapBackplaneN,7),16),

REGINFO("InputMapFP0",InputMapFP(0),32),
REGINFO("InputMapFP1",InputMapFP(1),32),
REGINFO("InputMapFP2",InputMapFP(2),32),
REGINFO("InputMapFP3",InputMapFP(3),32),
REGINFO("InputMapFP4",InputMapFP(4),32),
REGINFO("InputMapFP5",InputMapFP(5),32),
REGINFO("InputMapFP6",InputMapFP(6),32),
REGINFO("InputMapFP7",InputMapFP(7),32),

REGINFO("CML0Low",OutputCMLLow(0),32),
REGINFO("CML0Rise",OutputCMLRise(0),32),
REGINFO("CML0High",OutputCMLHigh(0),32),
REGINFO("CML0Fall",OutputCMLFall(0),32),
REGINFO("CML0Ena",OutputCMLEna(0),32),
REGINFO("CML0Cnt",OutputCMLCount(0),32),
REGINFO("CML0Len",OutputCMLPatLength(0),32),
REGINFO("CML0Pat0",OutputCMLPat(0,0),32),
REGINFO("CML0Pat1",OutputCMLPat(0,1),32),

REGINFO("CML1Low",OutputCMLLow(1),32),
REGINFO("CML1Rise",OutputCMLRise(1),32),
REGINFO("CML1High",OutputCMLHigh(1),32),
REGINFO("CML1Fall",OutputCMLFall(1),32),
REGINFO("CML1Ena",OutputCMLEna(1),32),
REGINFO("CML1Cnt",OutputCMLCount(1),32),
REGINFO("CML1Len",OutputCMLPatLength(1),32),
REGINFO("CML1Pat0",OutputCMLPat(1,0),32),
REGINFO("CML1Pat1",OutputCMLPat(1,1),32),

REGINFO("TXBuf0-3",DataTx(0),32),
REGINFO("RXBuf0-3",DataRx(0),32)
REGINFO("RXBuf4-7",DataRx(1),32),
REGINFO("TXBuf8-11",DataTx(2),32),
REGINFO("RXBuf12-15",DataRx(3),32),
REGINFO("TXBuf16-19",DataTx(4),32),
REGINFO("RXBuf20-23",DataRx(5),32),
REGINFO("RXBuf24-27",DataRx(6),32),
REGINFO("RXBuf28-31",DataRx(7),32),

REGINFO("EventLog0",EventLog(0),32),
REGINFO("EventLog1",EventLog(1),32),
REGINFO("EventLog2",EventLog(2),32),
REGINFO("EventLog3",EventLog(3),32),
REGINFO("EventLog4",EventLog(4),32),
REGINFO("EventLog5",EventLog(5),32),
REGINFO("EventLog6",EventLog(6),32),
REGINFO("EventLog7",EventLog(7),32),

#undef REGINFO
};

Expand All @@ -364,19 +516,25 @@ printregisters(volatile epicsUInt8 *evr,epicsUInt32 len)

switch(printreg[reg].rsize){
case 8:
printf("%9s: %02x\n",
printreg[reg].label,
ioread8(evr+printreg[reg].offset));
printf("0x%05x %02x %-9s\n",
printreg[reg].offset,
ioread8(evr+printreg[reg].offset),
printreg[reg].label
);
break;
case 16:
printf("%9s: %04x\n",
printreg[reg].label,
nat_ioread16(evr+printreg[reg].offset));
printf("0x%05x %04x %-9s\n",
printreg[reg].offset,
nat_ioread16(evr+printreg[reg].offset),
printreg[reg].label
);
break;
case 32:
printf("%9s: %08x\n",
printreg[reg].label,
nat_ioread32(evr+printreg[reg].offset));
printf("0x%05x %08x %-9s\n",
printreg[reg].offset,
nat_ioread32(evr+printreg[reg].offset),
printreg[reg].label
);
break;
}
}
Expand Down
3 changes: 3 additions & 0 deletions mrfCommon/src/mrfBitOps.h
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Original file line number Diff line number Diff line change
Expand Up @@ -32,4 +32,7 @@
#define BITFLIP(ord,len,base,offset,mask) \
ord ## _WRITE ## len(base,offset, (ord ## _READ ## len(base,offset) ^ (epicsUInt ## len)(mask)))

// Get U16 address
#define U16_REG(base, no) (base + (2 * (no)))

#endif /* MRFBITOPS_H */