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Merge pull request hathach#2906 from hathach/add-ra8m1
Add ra8m1_ek
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if (TOOLCHAIN STREQUAL "gcc") | ||
set(TOOLCHAIN_COMMON_FLAGS | ||
-mthumb | ||
-mcpu=cortex-m85 | ||
-mfloat-abi=hard | ||
-mfpu=fpv5-d16 | ||
) | ||
set(FREERTOS_PORT GCC_ARM_CM85_NTZ_NONSECURE CACHE INTERNAL "") | ||
|
||
elseif (TOOLCHAIN STREQUAL "clang") | ||
set(TOOLCHAIN_COMMON_FLAGS | ||
--target=arm-none-eabi | ||
-mcpu=cortex-m85 | ||
-mfpu=fpv5-d16 | ||
) | ||
set(FREERTOS_PORT GCC_ARM_CM85_NTZ_NONSECURE CACHE INTERNAL "") | ||
|
||
elseif (TOOLCHAIN STREQUAL "iar") | ||
set(TOOLCHAIN_COMMON_FLAGS | ||
--cpu cortex-m85 | ||
--fpu VFPv5_D16 | ||
) | ||
set(FREERTOS_PORT IAR_ARM_CM85_NTZ_NONSECURE CACHE INTERNAL "") | ||
|
||
endif () |
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ifeq ($(TOOLCHAIN),gcc) | ||
CFLAGS += \ | ||
-mthumb \ | ||
-mcpu=cortex-m85 \ | ||
-mfloat-abi=hard \ | ||
-mfpu=fpv5-d16 \ | ||
|
||
else ifeq ($(TOOLCHAIN),clang) | ||
CFLAGS += \ | ||
--target=arm-none-eabi \ | ||
-mcpu=cortex-m85 \ | ||
-mfpu=fpv5-d16 \ | ||
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else ifeq ($(TOOLCHAIN),iar) | ||
CFLAGS += \ | ||
--cpu cortex-m85 \ | ||
--fpu VFPv5_D16 \ | ||
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ASFLAGS += \ | ||
--cpu cortex-m85 \ | ||
--fpu VFPv5_D16 \ | ||
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else | ||
$(error "TOOLCHAIN is not supported") | ||
endif | ||
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FREERTOS_PORTABLE_SRC ?= $(FREERTOS_PORTABLE_PATH)/ARM_CM85_NTZ/non_secure |
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@@ -1,45 +1,13 @@ | ||
/* | ||
* The MIT License (MIT) | ||
* | ||
* Copyright (c) 2023 Ha Thach (tinyusb.org) | ||
* | ||
* Permission is hereby granted, free of charge, to any person obtaining a copy | ||
* of this software and associated documentation files (the "Software"), to deal | ||
* in the Software without restriction, including without limitation the rights | ||
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell | ||
* copies of the Software, and to permit persons to whom the Software is | ||
* furnished to do so, subject to the following conditions: | ||
* | ||
* The above copyright notice and this permission notice shall be included in | ||
* all copies or substantial portions of the Software. | ||
* | ||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE | ||
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | ||
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, | ||
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN | ||
* THE SOFTWARE. | ||
* | ||
*/ | ||
|
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#ifndef _BOARD_CFG_H | ||
#define _BOARD_CFG_H | ||
|
||
/* generated configuration header file - do not edit */ | ||
#ifndef BOARD_CFG_H_ | ||
#define BOARD_CFG_H_ | ||
#ifdef __cplusplus | ||
extern "C" { | ||
#endif | ||
|
||
#if defined(BSP_MCU_GROUP_RA6M5) || defined(BSP_MCU_GROUP_RA6M3) || (BSP_CFG_MCU_PART_SERIES == 8) | ||
#define BOARD_HAS_USB_HIGHSPEED | ||
#endif | ||
extern "C" { | ||
#endif | ||
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// for SystemInit() | ||
void bsp_init(void * p_args); | ||
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#ifdef __cplusplus | ||
} | ||
#endif | ||
void bsp_init(void * p_args); | ||
|
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#endif | ||
#ifdef __cplusplus | ||
} | ||
#endif | ||
#endif /* BOARD_CFG_H_ */ |
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11 changes: 0 additions & 11 deletions
11
hw/bsp/ra/boards/portenta_c33/fsp_cfg/bsp/bsp_mcu_device_pn_cfg.h
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62 changes: 62 additions & 0 deletions
62
hw/bsp/ra/boards/portenta_c33/ra_cfg/fsp_cfg/bsp/bsp_cfg.h
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Original file line number | Diff line number | Diff line change |
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/* generated configuration header file - do not edit */ | ||
#ifndef BSP_CFG_H_ | ||
#define BSP_CFG_H_ | ||
#ifdef __cplusplus | ||
extern "C" { | ||
#endif | ||
|
||
#include "bsp_clock_cfg.h" | ||
#include "bsp_mcu_family_cfg.h" | ||
#include "board_cfg.h" | ||
#define RA_NOT_DEFINED 0 | ||
#ifndef BSP_CFG_RTOS | ||
#if (RA_NOT_DEFINED) != (RA_NOT_DEFINED) | ||
#define BSP_CFG_RTOS (2) | ||
#elif (RA_NOT_DEFINED) != (RA_NOT_DEFINED) | ||
#define BSP_CFG_RTOS (1) | ||
#else | ||
#define BSP_CFG_RTOS (0) | ||
#endif | ||
#endif | ||
#ifndef BSP_CFG_RTC_USED | ||
#define BSP_CFG_RTC_USED (RA_NOT_DEFINED) | ||
#endif | ||
#undef RA_NOT_DEFINED | ||
#if defined(_RA_BOOT_IMAGE) | ||
#define BSP_CFG_BOOT_IMAGE (1) | ||
#endif | ||
#define BSP_CFG_MCU_VCC_MV (3300) | ||
#define BSP_CFG_STACK_MAIN_BYTES (0x1000) | ||
#define BSP_CFG_HEAP_BYTES (0x1000) | ||
#define BSP_CFG_PARAM_CHECKING_ENABLE (0) | ||
#define BSP_CFG_ASSERT (0) | ||
#define BSP_CFG_ERROR_LOG (0) | ||
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#define BSP_CFG_PFS_PROTECT ((1)) | ||
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#define BSP_CFG_C_RUNTIME_INIT ((1)) | ||
#define BSP_CFG_EARLY_INIT ((0)) | ||
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#define BSP_CFG_STARTUP_CLOCK_REG_NOT_RESET ((0)) | ||
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#ifndef BSP_CLOCK_CFG_MAIN_OSC_POPULATED | ||
#define BSP_CLOCK_CFG_MAIN_OSC_POPULATED (1) | ||
#endif | ||
|
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#ifndef BSP_CLOCK_CFG_MAIN_OSC_CLOCK_SOURCE | ||
#define BSP_CLOCK_CFG_MAIN_OSC_CLOCK_SOURCE (0) | ||
#endif | ||
#ifndef BSP_CLOCK_CFG_SUBCLOCK_DRIVE | ||
#define BSP_CLOCK_CFG_SUBCLOCK_DRIVE (0) | ||
#endif | ||
#ifndef BSP_CLOCK_CFG_SUBCLOCK_POPULATED | ||
#define BSP_CLOCK_CFG_SUBCLOCK_POPULATED (1) | ||
#endif | ||
#ifndef BSP_CLOCK_CFG_SUBCLOCK_STABILIZATION_MS | ||
#define BSP_CLOCK_CFG_SUBCLOCK_STABILIZATION_MS 1000 | ||
#endif | ||
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#ifdef __cplusplus | ||
} | ||
#endif | ||
#endif /* BSP_CFG_H_ */ |
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