Adding RP2350 SDK and target framework (betaflight#13988)

* Adding RP2350 SDK and target framework

* Spacing

* Removing board definitions

lib/main/pico-sdk/common/README.md

@@ -0,0 +1,3 @@
+This directory code that is common to all builds regardless of `PICO_PLATFORM`. It is a mix
+of common header files, or high level functionality built entirely using `hardware_` or `pico_` libraries provided
+by the actual target `PICO_PLATFORM`` 

lib/main/pico-sdk/common/boot_picobin_headers/include/boot/picobin.h

@@ -0,0 +1,171 @@
+/*
+ * Copyright (c) 2020 Raspberry Pi (Trading) Ltd.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef _BOOT_PICOBIN_H
+#define _BOOT_PICOBIN_H
+
+#ifndef NO_PICO_PLATFORM
+#include "pico/platform.h"
+#else
+#ifndef _u
+#ifdef __ASSEMBLER__
+#define _u(x) x
+#else
+#define _u(x) x ## u
+#endif
+#endif
+#endif
+
+/** \file picobin.h
+*  \defgroup boot_picobin_headers boot_picobin_headers
+*
+* \brief Constants for PICOBIN format
+*/
+
+// these are designed to not look like (likely) 16/32-bit ARM or RISC-V instructions or look like valid pointers
+#define PICOBIN_BLOCK_MARKER_START _u(0xffffded3)
+#define PICOBIN_BLOCK_MARKER_END   _u(0xab123579)
+
+#define PICOBIN_MAX_BLOCK_SIZE _u(0x280)
+#define PICOBIN_MAX_IMAGE_DEF_BLOCK_SIZE _u(0x180)
+#define PICOBIN_MAX_PARTITION_TABLE_BLOCK_SIZE _u(0x280)
+
+// note bit 6 is used to make parity even
+#define PICOBIN_BLOCK_ITEM_1BS_NEXT_BLOCK_OFFSET        _u(0x41)
+#define PICOBIN_BLOCK_ITEM_1BS_IMAGE_TYPE               _u(0x42)
+#define PICOBIN_BLOCK_ITEM_1BS_VECTOR_TABLE             _u(0x03)
+#define PICOBIN_BLOCK_ITEM_1BS_ENTRY_POINT              _u(0x44)
+#define PICOBIN_BLOCK_ITEM_1BS_ROLLING_WINDOW_DELTA     _u(0x05)
+#define PICOBIN_BLOCK_ITEM_LOAD_MAP                     _u(0x06)
+#define PICOBIN_BLOCK_ITEM_1BS_HASH_DEF                 _u(0x47)
+#define PICOBIN_BLOCK_ITEM_1BS_VERSION                  _u(0x48)
+#define PICOBIN_BLOCK_ITEM_SIGNATURE                    _u(0x09)
+#define PICOBIN_BLOCK_ITEM_PARTITION_TABLE              _u(0x0a)
+#define PICOBIN_BLOCK_ITEM_HASH_VALUE                   _u(0x4b)
+#define PICOBIN_BLOCK_ITEM_SALT                         _u(0x0c)
+
+#define PICOBIN_BLOCK_ITEM_2BS_IGNORED          (_u(0x80) | _u(0x7e))
+#define PICOBIN_BLOCK_ITEM_2BS_LAST             (_u(0x80) | _u(0x7f))
+
+// ----
+
+#define PICOBIN_INDEX_TO_BITS(y, x) (y ## _ ## x << y ## _LSB)
+
+#define PICOBIN_IMAGE_TYPE_IMAGE_TYPE_LSB            _u(0)
+#define PICOBIN_IMAGE_TYPE_IMAGE_TYPE_BITS           _u(0x000f)
+#define PICOBIN_IMAGE_TYPE_IMAGE_TYPE_INVALID        _u(0x0)
+#define PICOBIN_IMAGE_TYPE_IMAGE_TYPE_EXE            _u(0x1)
+#define PICOBIN_IMAGE_TYPE_IMAGE_TYPE_DATA           _u(0x2)
+#define PICOBIN_IMAGE_TYPE_IMAGE_TYPE_AS_BITS(x) PICOBIN_INDEX_TO_BITS(PICOBIN_IMAGE_TYPE_IMAGE_TYPE, x)
+
+#define PICOBIN_IMAGE_TYPE_EXE_SECURITY_LSB          _u(4)
+#define PICOBIN_IMAGE_TYPE_EXE_SECURITY_BITS         _u(0x0030)
+#define PICOBIN_IMAGE_TYPE_EXE_SECURITY_UNSPECIFIED  _u(0x0)
+#define PICOBIN_IMAGE_TYPE_EXE_SECURITY_NS           _u(0x1)
+#define PICOBIN_IMAGE_TYPE_EXE_SECURITY_S            _u(0x2)
+#define PICOBIN_IMAGE_TYPE_EXE_SECURITY_AS_BITS(x) PICOBIN_INDEX_TO_BITS(PICOBIN_IMAGE_TYPE_EXE_SECURITY, x)
+
+#define PICOBIN_IMAGE_TYPE_EXE_CPU_LSB               _u(8)
+#define PICOBIN_IMAGE_TYPE_EXE_CPU_BITS              _u(0x0700)
+#define PICOBIN_IMAGE_TYPE_EXE_CPU_ARM               _u(0)
+#define PICOBIN_IMAGE_TYPE_EXE_CPU_RISCV             _u(1)
+#define PICOBIN_IMAGE_TYPE_EXE_CPU_VARMULET          _u(2)
+#define PICOBIN_IMAGE_TYPE_EXE_CPU_AS_BITS(x) PICOBIN_INDEX_TO_BITS(PICOBIN_IMAGE_TYPE_EXE_CPU, x)
+
+#define PICOBIN_IMAGE_TYPE_EXE_CHIP_LSB              _u(12)
+#define PICOBIN_IMAGE_TYPE_EXE_CHIP_BITS             _u(0x7000)
+#define PICOBIN_IMAGE_TYPE_EXE_CHIP_RP2040           _u(0)
+#define PICOBIN_IMAGE_TYPE_EXE_CHIP_RP2350           _u(1)
+#define PICOBIN_IMAGE_TYPE_EXE_CHIP_AS_BITS(x) PICOBIN_INDEX_TO_BITS(PICOBIN_IMAGE_TYPE_EXE_CHIP, x)
+
+#define PICOBIN_IMAGE_TYPE_EXE_TBYB_BITS             _u(0x8000)
+
+// todo assert no overlap ^
+
+#define PICOBIN_PARTITION_PERMISSIONS_LSB                                   _u(26)
+#define PICOBIN_PARTITION_PERMISSIONS_BITS                                  _u(0xfc000000)
+
+#define PICOBIN_PARTITION_PERMISSION_S_R_BITS                               _u(0x04000000)
+#define PICOBIN_PARTITION_PERMISSION_S_W_BITS                               _u(0x08000000)
+#define PICOBIN_PARTITION_PERMISSION_NS_R_BITS                              _u(0x10000000)
+#define PICOBIN_PARTITION_PERMISSION_NS_W_BITS                              _u(0x20000000)
+#define PICOBIN_PARTITION_PERMISSION_NSBOOT_R_BITS                          _u(0x40000000)
+#define PICOBIN_PARTITION_PERMISSION_NSBOOT_W_BITS                          _u(0x80000000)
+
+#define PICOBIN_PARTITION_LOCATION_FIRST_SECTOR_LSB                         _u(0)
+#define PICOBIN_PARTITION_LOCATION_FIRST_SECTOR_BITS                        _u(0x00001fff)
+#define PICOBIN_PARTITION_LOCATION_LAST_SECTOR_LSB                          _u(13)
+#define PICOBIN_PARTITION_LOCATION_LAST_SECTOR_BITS                         _u(0x03ffe000)
+
+#define PICOBIN_PARTITION_FLAGS_HAS_ID_BITS                                 _u(0x00000001)
+#define PICOBIN_PARTITION_FLAGS_LINK_TYPE_LSB                               _u(1)
+#define PICOBIN_PARTITION_FLAGS_LINK_TYPE_BITS                              _u(0x00000006)
+#define PICOBIN_PARTITION_FLAGS_LINK_VALUE_LSB                              _u(3)
+#define PICOBIN_PARTITION_FLAGS_LINK_VALUE_BITS                             _u(0x00000078)
+
+#define PICOBIN_PARTITION_MAX_EXTRA_FAMILIES                                _u(3)
+#define PICOBIN_PARTITION_FLAGS_ACCEPTS_NUM_EXTRA_FAMILIES_LSB              _u(7)
+#define PICOBIN_PARTITION_FLAGS_ACCEPTS_NUM_EXTRA_FAMILIES_BITS             _u(0x00000180)
+// these are an optimization when booting in either ARM or RISC-V, to avoid looking at partitions
+// which are known not to contain the right sort of binary, OR as a way to prevent
+// auto-architecture-switch. NOTE: the first partition that can be booted, will be,
+// so if you have a RISC-V binary in the first partition, and auto-arhcitecture-switch enabled, then
+// even if booting under ARM, with an ARM binary in a later partition, the RISC-V binary
+// will be booted by default; setting PICOBIN_PARTITION_FLAGS_IGNORED_DURING_ARM_BOOT_BITS
+// on the partition, will have the RISC-V binary containing partition ignored under ARM
+// boot
+#define PICOBIN_PARTITION_FLAGS_IGNORED_DURING_ARM_BOOT_BITS                _u(0x00000200)
+#define PICOBIN_PARTITION_FLAGS_IGNORED_DURING_RISCV_BOOT_BITS              _u(0x00000400)
+#define PICOBIN_PARTITION_FLAGS_UF2_DOWNLOAD_AB_NON_BOOTABLE_OWNER_AFFINITY _u(0x00000800)
+#define PICOBIN_PARTITION_FLAGS_HAS_NAME_BITS                               _u(0x00001000)
+#define PICOBIN_PARTITION_FLAGS_UF2_DOWNLOAD_NO_REBOOT_BITS                 _u(0x00002000)
+// we have a bit for each well known family-id .. note we expect there to be more in the future with new chips,
+// but we have plenty of space for now.
+#define PICOBIN_PARTITION_FLAGS_ACCEPTS_DEFAULT_FAMILIES_LSB                _u(14)
+#define PICOBIN_PARTITION_FLAGS_ACCEPTS_DEFAULT_FAMILY_RP2040_BITS          _u(0x00004000)
+#define PICOBIN_PARTITION_FLAGS_ACCEPTS_DEFAULT_FAMILY_ABSOLUTE_BITS        _u(0x00008000)
+#define PICOBIN_PARTITION_FLAGS_ACCEPTS_DEFAULT_FAMILY_DATA_BITS            _u(0x00010000)
+#define PICOBIN_PARTITION_FLAGS_ACCEPTS_DEFAULT_FAMILY_RP2350_ARM_S_BITS    _u(0x00020000)
+#define PICOBIN_PARTITION_FLAGS_ACCEPTS_DEFAULT_FAMILY_RP2350_RISCV_BITS    _u(0x00040000)
+#define PICOBIN_PARTITION_FLAGS_ACCEPTS_DEFAULT_FAMILY_RP2350_ARM_NS_BITS   _u(0x00080000)
+
+#define PICOBIN_PARTITION_FLAGS_LINK_TYPE_NONE                        _u(0)
+#define PICOBIN_PARTITION_FLAGS_LINK_TYPE_A_PARTITION                 _u(1)
+#define PICOBIN_PARTITION_FLAGS_LINK_TYPE_OWNER_PARTITION             _u(2)
+#define PICOBIN_PARTITION_FLAGS_LINK_TYPE_AS_BITS(x) PICOBIN_INDEX_TO_BITS(PICOBIN_PARTITION_FLAGS_LINK_TYPE, x)
+
+
+#define PICOBIN_HASH_SHA256                    _u(0x01)
+
+#define PICOBIN_SIGNATURE_SECP256K1            _u(0x01)
+
+#ifndef __ASSEMBLER__
+
+#include <stdbool.h>
+
+typedef struct {
+    // these must all be word aligned
+    uint32_t storage_address_rel;
+    uint32_t runtime_address;
+    uint32_t size;
+} picobin_load_map_entry;
+
+typedef struct {
+    uint32_t header;
+    picobin_load_map_entry entries[];
+} picobin_load_map;
+
+static inline unsigned int picobin_load_map_entry_count(const picobin_load_map *lm) {
+    return (lm->header << 1) >> 25;
+}
+
+static inline bool picobin_load_map_is_relative(const picobin_load_map *lm) {
+    return (int32_t)lm->header >= 0;
+}
+
+#endif
+
+#endif

lib/main/pico-sdk/common/boot_picoboot_headers/include/boot/picoboot.h

@@ -0,0 +1,175 @@
+/*
+ * Copyright (c) 2020 Raspberry Pi (Trading) Ltd.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef _BOOT_PICOBOOT_H
+#define _BOOT_PICOBOOT_H
+
+#include <stdint.h>
+#include <stdbool.h>
+#include <assert.h>
+
+#ifndef NO_PICO_PLATFORM
+#include "pico/platform.h"
+#endif
+
+/** \file picoboot.h
+*  \defgroup boot_picoboot_headers boot_picoboot_headers
+*
+* \brief Header file for the PICOBOOT USB interface exposed by an RP2xxx chip in BOOTSEL mode
+*/
+
+#include "picoboot_constants.h"
+
+#define PICOBOOT_MAGIC 0x431fd10bu
+
+// --------------------------------------------
+// CONTROL REQUESTS FOR THE PICOBOOT INTERFACE
+// --------------------------------------------
+
+// size 0 OUT - un-stall EPs and reset
+#define PICOBOOT_IF_RESET 0x41
+
+// size 16 IN - return the status of the last command
+#define PICOBOOT_IF_CMD_STATUS 0x42
+
+// --------------------------------------------------
+// COMMAND REQUESTS SENT TO THE PICOBOOT OUT ENDPOINT
+// --------------------------------------------------
+//
+// picoboot_cmd structure of size 32 is sent to OUT endpoint
+// transfer_length bytes are transferred via IN/OUT
+// device responds on success with 0 length ACK packet set via OUT/IN
+// device may stall the transferring endpoint in case of error
+
+enum picoboot_cmd_id {
+    PC_EXCLUSIVE_ACCESS = 0x1,
+    PC_REBOOT = 0x2,
+    PC_FLASH_ERASE = 0x3,
+    PC_READ = 0x84, // either RAM or FLASH
+    PC_WRITE = 0x5, // either RAM or FLASH (does no erase)
+    PC_EXIT_XIP = 0x6,
+    PC_ENTER_CMD_XIP = 0x7,
+    PC_EXEC = 0x8,
+    PC_VECTORIZE_FLASH = 0x9,
+    // RP2350 only below here
+    PC_REBOOT2 = 0xa,
+    PC_GET_INFO = 0x8b,
+    PC_OTP_READ = 0x8c,
+    PC_OTP_WRITE = 0xd,
+    //PC_EXEC2 = 0xe, // currently unused
+};
+
+enum picoboot_status {
+    PICOBOOT_OK = 0,
+    PICOBOOT_UNKNOWN_CMD = 1,
+    PICOBOOT_INVALID_CMD_LENGTH = 2,
+    PICOBOOT_INVALID_TRANSFER_LENGTH = 3,
+    PICOBOOT_INVALID_ADDRESS = 4,
+    PICOBOOT_BAD_ALIGNMENT = 5,
+    PICOBOOT_INTERLEAVED_WRITE = 6,
+    PICOBOOT_REBOOTING = 7,
+    PICOBOOT_UNKNOWN_ERROR = 8,
+    PICOBOOT_INVALID_STATE = 9,
+    PICOBOOT_NOT_PERMITTED = 10,
+    PICOBOOT_INVALID_ARG = 11,
+    PICOBOOT_BUFFER_TOO_SMALL = 12,
+    PICOBOOT_PRECONDITION_NOT_MET = 13,
+    PICOBOOT_MODIFIED_DATA = 14,
+    PICOBOOT_INVALID_DATA = 15,
+    PICOBOOT_NOT_FOUND = 16,
+    PICOBOOT_UNSUPPORTED_MODIFICATION = 17,
+};
+
+struct __packed picoboot_reboot_cmd {
+    uint32_t dPC; // 0 means reset into regular boot path
+    uint32_t dSP;
+    uint32_t dDelayMS;
+};
+
+
+// note this (with pc_sp) union member has the same layout as picoboot_reboot_cmd except with extra dFlags
+struct __packed picoboot_reboot2_cmd {
+    uint32_t dFlags;
+    uint32_t dDelayMS;
+    uint32_t dParam0;
+    uint32_t dParam1;
+};
+
+// used for EXEC, VECTORIZE_FLASH
+struct __packed picoboot_address_only_cmd {
+    uint32_t dAddr;
+};
+
+// used for READ, WRITE, FLASH_ERASE
+struct __packed picoboot_range_cmd {
+    uint32_t dAddr;
+    uint32_t dSize;
+};
+
+struct __packed picoboot_exec2_cmd {
+    uint32_t image_base;
+    uint32_t image_size;
+    uint32_t workarea_base;
+    uint32_t workarea_size;
+};
+
+enum picoboot_exclusive_type {
+    NOT_EXCLUSIVE = 0,
+    EXCLUSIVE,
+    EXCLUSIVE_AND_EJECT
+};
+
+struct __packed picoboot_exclusive_cmd {
+    uint8_t bExclusive;
+};
+
+struct __packed picoboot_otp_cmd {
+    uint16_t wRow; // OTP row
+    uint16_t wRowCount; // number of rows to transfer
+    uint8_t bEcc; // use error correction (16 bit per register vs 24 (stored as 32) bit raw)
+};
+
+
+struct __packed picoboot_get_info_cmd {
+    uint8_t bType;
+    uint8_t bParam;
+    uint16_t wParam;
+    uint32_t dParams[3];
+};
+
+// little endian
+struct __packed __aligned(4) picoboot_cmd {
+    uint32_t dMagic;
+    uint32_t dToken; // an identifier for this token to correlate with a status response
+    uint8_t bCmdId; // top bit set for IN
+    uint8_t bCmdSize; // bytes of actual data in the arg part of this structure
+    uint16_t _unused;
+    uint32_t dTransferLength; // length of IN/OUT transfer (or 0) if none
+    union {
+        uint8_t args[16];
+        struct picoboot_reboot_cmd reboot_cmd;
+        struct picoboot_range_cmd range_cmd;
+        struct picoboot_address_only_cmd address_only_cmd;
+        struct picoboot_exclusive_cmd exclusive_cmd;
+        struct picoboot_reboot2_cmd reboot2_cmd;
+        struct picoboot_otp_cmd otp_cmd;
+        struct picoboot_get_info_cmd get_info_cmd;
+        struct picoboot_exec2_cmd exec2_cmd;
+    };
+};
+static_assert(32 == sizeof(struct picoboot_cmd), "picoboot_cmd must be 32 bytes big");
+
+struct __packed __aligned(4) picoboot_cmd_status {
+    uint32_t dToken;
+    uint32_t dStatusCode;
+    uint8_t bCmdId;
+    uint8_t bInProgress;
+    uint8_t _pad[6];
+};
+
+static_assert(16 == sizeof(struct picoboot_cmd_status), "picoboot_cmd_status must be 16 bytes big");
+
+#endif

lib/main/pico-sdk/common/boot_picoboot_headers/include/boot/picoboot_constants.h

@@ -0,0 +1,42 @@
+/*
+ * Copyright (c) 2020 Raspberry Pi (Trading) Ltd.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef _BOOT_PICOBOOT_CONSTANTS_H
+#define _BOOT_PICOBOOT_CONSTANTS_H
+
+#define REBOOT2_TYPE_MASK  0x0f
+
+// note these match REBOOT_TYPE in pico/bootrom_constants.h (also 0 is used for PC_SP for backwards compatibility with RP2040)
+// values 0-7 are secure/non-secure
+#define REBOOT2_FLAG_REBOOT_TYPE_NORMAL       0x0 // param0 = diagnostic partition
+#define REBOOT2_FLAG_REBOOT_TYPE_BOOTSEL      0x2 // param0 = bootsel_flags, param1 = gpio_config
+#define REBOOT2_FLAG_REBOOT_TYPE_RAM_IMAGE    0x3 // param0 = image_base, param1 = image_end
+#define REBOOT2_FLAG_REBOOT_TYPE_FLASH_UPDATE 0x4 // param0 = update_base
+
+// values 8-15 are secure only
+#define REBOOT2_FLAG_REBOOT_TYPE_PC_SP        0xd
+
+#define REBOOT2_FLAG_REBOOT_TO_ARM            0x10
+#define REBOOT2_FLAG_REBOOT_TO_RISCV          0x20
+
+#define REBOOT2_FLAG_NO_RETURN_ON_SUCCESS    0x100
+
+#define BOOTSEL_FLAG_DISABLE_MSD_INTERFACE      0x01
+#define BOOTSEL_FLAG_DISABLE_PICOBOOT_INTERFACE 0x02
+#define BOOTSEL_FLAG_GPIO_PIN_ACTIVE_LOW        0x10
+#define BOOTSEL_FLAG_GPIO_PIN_SPECIFIED         0x20
+
+#define PICOBOOT_GET_INFO_SYS              1
+#define PICOBOOT_GET_INFO_PARTTION_TABLE   2
+#define PICOBOOT_GET_INFO_UF2_TARGET_PARTITION 3
+#define PICOBOOT_GET_INFO_UF2_STATUS       4
+
+#define UF2_STATUS_IGNORED_FAMILY             0x01
+#define UF2_STATUS_ABORT_EXCLUSIVELY_LOCKED   0x10
+#define UF2_STATUS_ABORT_BAD_ADDRESS          0x20
+#define UF2_STATUS_ABORT_WRITE_ERROR          0x40
+#define UF2_STATUS_ABORT_REBOOT_FAILED        0x80
+#endif