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_tex/references.bib

@@ -6,7 +6,10 @@
 
 %% Saved with string encoding Unicode (UTF-8) 
 
-
+@online{Baker_compensating_OPAMP,
+author={R. J. Baker},
+title={Bad Circuit Design 3 - Compensating an Op-Amp},
+url={https://cmosedu.com/cmos1/bad_design/bad_design3/bad_design_3.htm}}
 
 @article{Razavi_2021_bandgap,
 	author = {Razavi, Behzad},

index.html

@@ -136,6 +136,7 @@
 <meta name="citation_fulltext_html_url" content="https://iic-jku.github.io/analog-circuit-design">
 <meta name="citation_doi" content="10.5281/zenodo.14387481">
 <meta name="citation_language" content="en-US">
+<meta name="citation_reference" content="citation_title=Bad circuit design 3 - compensating an op-amp;,citation_author=R. J. Baker;,citation_fulltext_html_url=https://cmosedu.com/cmos1/bad_design/bad_design3/bad_design_3.htm;">
 <meta name="citation_reference" content="citation_title=The Design of a Low-Voltage Bandgap Reference [The Analog Mind];,citation_author=Behzad Razavi;,citation_publication_date=2021;,citation_cover_date=2021;,citation_year=2021;,citation_issue=3;,citation_doi=10.1109/mssc.2021.3088963;,citation_issn=1943-0582;,citation_volume=13;,citation_journal_title=IEEE Solid-State Circuits Magazine;">
 <meta name="citation_reference" content="citation_title=The Low Dropout Regulator [A Circuit for All Seasons];,citation_author=Behzad Razavi;,citation_publication_date=2019-01;,citation_cover_date=2019-01;,citation_year=2019;,citation_fulltext_html_url=https://ieeexplore.ieee.org/document/8741287/;,citation_issue=2;,citation_doi=10.1109/mssc.2019.2910952;,citation_issn=1943-0582;,citation_volume=11;,citation_journal_title=IEEE Solid-State Circuits Magazine;">
 <meta name="citation_reference" content="citation_title=A 40nW, Sub-IV Truly “Digital” Reverse Bandgap Reference Using Bulk-Diodes in 16nm FinFET;,citation_author=Matthias Eberlein;,citation_author=Georgios Panagopoulos;,citation_author=Harald Pretl;,citation_publication_date=2018-11;,citation_cover_date=2018-11;,citation_year=2018;,citation_doi=10.1109/asscc.2018.8579306;,citation_volume=00;,citation_journal_title=2018 IEEE Asian Solid-State Circuits Conference (A-SSCC);">
@@ -2902,7 +2903,7 @@ <h2 data-number="8.7" class="anchored" data-anchor-id="sec-ota-variants-single-e
 </div>
 </div>
 </div>
-<p>Another popular version is shown in <a href="#fig-ota-se-twostage" class="quarto-xref">Figure&nbsp;34</a>. Here, we have a two-stage amplifier able to provide higher voltage gain. The first stage (the diffpair loaded by a current mirror) is followed by a single-stage common-source amplifier with current-source load. Being a two-stage amplifier with two high-ohmic nodes, stability is a concern, so usually we need some form of compensation (in <a href="#fig-ota-se-twostage" class="quarto-xref">Figure&nbsp;34</a> a very simplistic Miller-compensation using <span class="math inline">\(C_\mathrm{M}\)</span> is shown; often, we would want to implement a more advanced scheme). An advantage of this two-stage amplifier (compared with the simple 5T-OTA) is the dc-balanced load on top of the differential pair, as each side sees a voltage drop from <span class="math inline">\(V_\mathrm{DD}\)</span> of one <span class="math inline">\(V_\mathrm{GS}\)</span> (<span class="math inline">\(V_\mathrm{GS3}\)</span> on the left side, <span class="math inline">\(V_\mathrm{GS5}\)</span> on the right side).</p>
+<p>Another popular version is shown in <a href="#fig-ota-se-twostage" class="quarto-xref">Figure&nbsp;34</a>. Here, we have a two-stage amplifier able to provide higher voltage gain. The first stage (the diffpair loaded by a current mirror) is followed by a single-stage common-source amplifier with current-source load. Being a two-stage amplifier with two high-ohmic nodes, stability is a concern, so usually we need some form of compensation. <a href="#fig-ota-se-twostage" class="quarto-xref">Figure&nbsp;34</a> shows a very simplistic Miller-compensation using <span class="math inline">\(C_\mathrm{M}\)</span>. Often, we would want to implement a more advanced scheme. Some examples can be found in <span class="citation" data-cites="Baker_compensating_OPAMP">(<a href="#ref-Baker_compensating_OPAMP" role="doc-biblioref">Baker, n.d.</a>)</span>. An interesting technique is the indirect compensation with cascoded input differential pairs (see <a href="#fig-improved-ota" class="quarto-xref">Figure&nbsp;41</a>) for higher power supply rejection. An advantage of this two-stage amplifier (compared with the simple 5T-OTA) is the dc-balanced load on top of the differential pair, as each side sees a voltage drop from <span class="math inline">\(V_\mathrm{DD}\)</span> of one <span class="math inline">\(V_\mathrm{GS}\)</span> (<span class="math inline">\(V_\mathrm{GS3}\)</span> on the left side, <span class="math inline">\(V_\mathrm{GS5}\)</span> on the right side).</p>
 <div id="cell-fig-ota-se-twostage" class="cell" data-execution_count="27">
 <div class="cell-output cell-output-display">
 <div id="fig-ota-se-twostage" class="quarto-float quarto-figure quarto-figure-center anchored">
@@ -2936,7 +2937,7 @@ <h2 data-number="8.7" class="anchored" data-anchor-id="sec-ota-variants-single-e
 <p><span class="math display">\[
 V_\mathrm{out} \approx V_\mathrm{ref} \left( 1 + \frac{R_1}{R_2} \right)
 \]</span></p>
-<p>if the gain of the OTA is sufficiently high. The quiescent current through <span class="math inline">\(R_{1,2}\)</span> established a minimum load current for the LDO, which is often a good thing for stability. More information on LDOs can be found in <span class="citation" data-cites="Razavi_2019_ldo">(<a href="#ref-Razavi_2019_ldo" role="doc-biblioref">Razavi 2019</a>)</span>.</p>
+<p>if the gain of the OTA is sufficiently high. The quiescent current through <span class="math inline">\(R_{1,2}\)</span> establishes a minimum load current for the LDO, which is often good for stability. More information on LDOs can be found in <span class="citation" data-cites="Razavi_2019_ldo">(<a href="#ref-Razavi_2019_ldo" role="doc-biblioref">Razavi 2019</a>)</span>.</p>
 </section>
 </section>
 <section id="sec-cascode-stage" class="level1" data-number="9">
@@ -3923,7 +3924,7 @@ <h2 data-number="11.1" class="anchored" data-anchor-id="bandgap-reference"><span
 <p><span class="math display">\[
 V_\mathrm{ref} = V_\mathrm{BE}+ \frac{R_2}{R_1} \frac{k T}{q} \ln m.  
 \]</span></p>
-<p>By proper selection of <span class="math inline">\(R_1\)</span>, <span class="math inline">\(R_2\)</span> and <span class="math inline">\(n\)</span> we can satisfy <a href="#eq-bandgap-voltage-with-temp" class="quarto-xref">Equation&nbsp;33</a> to result in <a href="#eq-bandgap-voltage" class="quarto-xref">Equation&nbsp;34</a>.</p>
+<p>By proper selection of <span class="math inline">\(R_1\)</span>, <span class="math inline">\(R_2\)</span> and <span class="math inline">\(m\)</span> we can satisfy <a href="#eq-bandgap-voltage-with-temp" class="quarto-xref">Equation&nbsp;33</a> to result in <a href="#eq-bandgap-voltage" class="quarto-xref">Equation&nbsp;34</a>.</p>
 <div class="callout callout-style-default callout-note callout-titled" title="Improved Bandgap Reference">
 <div class="callout-header d-flex align-content-center">
 <div class="callout-icon-container">
@@ -3937,7 +3938,10 @@ <h2 data-number="11.1" class="anchored" data-anchor-id="bandgap-reference"><span
 <p>For an improved implementation of <a href="#fig-bandgap-simple" class="quarto-xref">Figure&nbsp;48</a>, the current mirrors should be cascoded, and a startup circuit should be included to guarantee proper operation after enabling it. Further, <a href="#eq-vbe-vs-temp" class="quarto-xref">Equation&nbsp;31</a> and <a href="#eq-delta-vbe-vs-temp" class="quarto-xref">Equation&nbsp;32</a> build on the relationship <span class="math inline">\(I_\mathrm{C} = f(V_\mathrm{BE})\)</span>, while we control <span class="math inline">\(I_\mathrm{E}\)</span> in this circuit. If <span class="math inline">\(\beta\)</span> is large then <span class="math inline">\(I_\mathrm{C} \approx I_\mathrm{E}\)</span>, but this is not the case for the used PNPs.</p>
 </div>
 </div>
-<p>The circuit of <a href="#fig-bandgap-simple" class="quarto-xref">Figure&nbsp;48</a> has been implemented in Xschem and is shown in <a href="#fig-bandgap-schematic" class="quarto-xref">Figure&nbsp;49</a>. The current sources have been improved by using cascodes. No base current compensation is implemented, as it is assumed that the <span class="math inline">\(\beta\)</span> of the PNP are similar although they are operated at different emitter current densities. Note the addition of a startup branch with <span class="math inline">\(M_\mathrm{startup}\)</span> which is inactive during normal operation but will inject a startup current if no proper bias point has yet been found. There is no circuitry added for enabling/disabling the circuit, which would also be needed for a practical implementation. As usual, the MOSFET sizing has been done in this <a href="./sizing/sizing_bandgap_simple-preview.html">notebook</a>.</p>
+<p>The circuit of <a href="#fig-bandgap-simple" class="quarto-xref">Figure&nbsp;48</a> has been implemented in Xschem and is shown in <a href="#fig-bandgap-schematic" class="quarto-xref">Figure&nbsp;49</a>. The current sources have been improved by using cascodes. We are using the low-voltage current mirror type already introduced in <a href="#sec-improved-ota" class="quarto-xref">Section&nbsp;10</a>. The bias voltages for the cascodes are generated via the voltage drops of <span class="math inline">\(R_3\)</span> and <span class="math inline">\(R_4\)</span>, respectively.</p>
+<p>No base current compensation for the BJTs is implemented, as it is assumed that the <span class="math inline">\(\beta\)</span> of the PNP are similar although they are operated at different emitter current densities.</p>
+<p>Note the addition of a startup branch with <span class="math inline">\(M_\mathrm{startup}\)</span> which is inactive during normal operation but will inject a startup current if no proper bias point has yet been found.</p>
+<p>There is no circuitry added for enabling/disabling the circuit, which would also be needed for a practical implementation. As usual, the MOSFET sizing has been done in this <a href="./sizing/sizing_bandgap_simple-preview.html">notebook</a>.</p>
 <p>The resistors <span class="math inline">\(R_{1-4}\)</span> have been implemented out of unit elements of ca. <span class="math inline">\(5\,\text{k}\Omega\)</span> for optimum matching. Building a bandgap for the first time on silicon likely will show a slightly deviating temperature coefficient, which is why we keep a few dummy resistors around in <span class="math inline">\(R_2\)</span> to compensate the TC in a redesign.</p>
 <div id="fig-bandgap-schematic" class="quarto-float quarto-figure quarto-figure-center anchored">
 <figure class="quarto-float quarto-float-fig figure">
@@ -4039,6 +4043,7 @@ <h1 data-number="12"><span class="header-section-number">12</span> Differential
 <p>In addition, we realize that <span class="math inline">\(V_\mathrm{GS4} = V_\mathrm{GS3} = V_\mathrm{GS5} = V_\mathrm{GS6}\)</span> for common-mode operation, hence the quiescent current of <span class="math inline">\(M_{4,6}\)</span> is set in a current-mirror-like fashion by the diode-connected <span class="math inline">\(M_{3,5}\)</span>.</p>
 <p>For differential operation, the differential pair of <span class="math inline">\(M_{1,2}\)</span> is loaded by <span class="math inline">\(R_\mathrm{load}\)</span> and provides fairly high gain. The second gain stage is formed by current-source-loaded common-source stages <span class="math inline">\(M_{4,6}\)</span> and provides additional gain (of course, this is a function of the load impedance).</p>
 <p>As soon as we implement a two-stage amplifier we need to look into stability. We likely have more than two poles, and in the case of the amplifier in <a href="#fig-diff-ota-resload" class="quarto-xref">Figure&nbsp;53</a> we have a low-frequency pole at the drains of <span class="math inline">\(M_{1,3}\)</span> and <span class="math inline">\(M_{2,5}\)</span> and a further low-frequency pole at the output. Any additional pole will add further phase shift making stability critical. We now need a method to stabilize this amplifier and thus we will look into <em>Miller compensation</em>.</p>
+<p>Of course, loop gain analysis of differential OTAs can and should be carried out. An exemplary testbench where the loop gain is simulated with Rosenstark’s, Middlebrook’s, and Tian’s method can be found <a href="xschem/ota-differential_tb-loopgain.sch">here</a>. Note that there is no underlying circuit right now and it should only show how it could be done.</p>
 <section id="miller-compensation" class="level2" data-number="12.1">
 <h2 data-number="12.1" class="anchored" data-anchor-id="miller-compensation"><span class="header-section-number">12.1</span> Miller Compensation</h2>
 <p>A popular way to stabilize a multi-pole feedback-system is to make one pole dominant, and try to shift the other poles to sufficiently high frequencies, that we have enough <a href="https://en.wikipedia.org/wiki/Phase_margin">phase margin</a> in the closed-loop system. We may strive for <span class="math inline">\(60^\circ\)</span> as this will only cause a minor peaking in the frequency response <span class="citation" data-cites="Gray_Meyer_5th_ed">(<a href="#ref-Gray_Meyer_5th_ed" role="doc-biblioref">Gray et al. 2009</a>)</span>.</p>
@@ -4583,6 +4588,9 @@ <h2 data-number="21.8" class="anchored" data-anchor-id="further-reading"><span c
 </section>
 
 <div id="quarto-appendix" class="default"><section class="quarto-appendix-contents" role="doc-bibliography" id="quarto-bibliography"><h2 class="anchored quarto-appendix-heading">References</h2><div id="refs" class="references csl-bib-body hanging-indent" data-entry-spacing="0" role="list">
+<div id="ref-Baker_compensating_OPAMP" class="csl-entry" role="listitem">
+Baker, R. J. n.d. <span>“Bad Circuit Design 3 - Compensating an Op-Amp.”</span> <a href="https://cmosedu.com/cmos1/bad_design/bad_design3/bad_design_3.htm">https://cmosedu.com/cmos1/bad_design/bad_design3/bad_design_3.htm</a>.
+</div>
 <div id="ref-Banba_1999" class="csl-entry" role="listitem">
 Banba, H., H. Shiga, A. Umezawa, T. Miyaba, T. Tanzawa, S. Atsumi, and K. Sakui. 1999. <span>“A <span>CMOS</span> Bandgap Reference Circuit with <span class="nocase">sub-1-V</span> Operation.”</span> <em>IEEE Journal of Solid-State Circuits</em> 34 (5): 670–74. <a href="https://doi.org/10.1109/4.760378">https://doi.org/10.1109/4.760378</a>.
 </div>

sizing/lookup_sg13.out.ipynb

@@ -6,7 +6,7 @@
    "source": [
     "# MOSFET gm/ID Lookup for IHP SG13G2"
    ],
-   "id": "422e90e2-f32e-4752-85cc-0cfbd450d353"
+   "id": "a9e03338-d4e9-4908-9231-ca6621cae383"
   },
   {
    "cell_type": "markdown",

sizing/sizing_bandgap_simple.out.ipynb

@@ -6,7 +6,7 @@
    "source": [
     "# Sizing for Bandgap Reference"
    ],
-   "id": "3c5b0fc1-76ac-4a1d-93fc-e51127867307"
+   "id": "e6cb9bc5-9b04-4fa1-95a9-f03a0864b5fd"
   },
   {
    "cell_type": "markdown",

sizing/sizing_basic_ota.out.ipynb

@@ -6,7 +6,7 @@
    "source": [
     "# Sizing for Basic 5T-OTA"
    ],
-   "id": "8a002f3f-b4df-48e5-b092-54aafb08b0be"
+   "id": "f91ad45e-e9d4-4e71-a6f8-fe0ef358f705"
   },
   {
    "cell_type": "markdown",

sizing/sizing_basic_ota_improved.out.ipynb

@@ -6,7 +6,7 @@
    "source": [
     "# Sizing for Basic (Improved) OTA"
    ],
-   "id": "c20d4225-db7a-4df8-a253-b8c07392b281"
+   "id": "3427feb3-8b1e-4328-948c-329898e6a1f9"
   },
   {
    "cell_type": "markdown",

sizing/sizing_basic_ota_improved_w_circuit.out.ipynb

@@ -6,7 +6,7 @@
    "source": [
     "# Sizing for Basic (Improved) OTA With Schematic"
    ],
-   "id": "5a418c5b-0606-40b5-b3d8-ec339ef7e829"
+   "id": "9d3213ee-9c29-48e4-a55e-2da096180b3b"
   },
   {
    "cell_type": "markdown",

sizing/sizing_basic_ota_w_circuit.out.ipynb

@@ -6,7 +6,7 @@
    "source": [
     "# Sizing for Basic 5T-OTA With Schematic"
    ],
-   "id": "2c11fcc0-6fb7-4743-8575-4e8a77b83fca"
+   "id": "f80b5de3-4dbd-4bdb-9b7d-e73b91cb6892"
   },
   {
    "cell_type": "markdown",

sizing/sizing_current_mirror.out.ipynb

@@ -6,7 +6,7 @@
    "source": [
     "# Sizing for Improved Current Mirror"
    ],
-   "id": "60db7f4c-f3a2-4749-b002-f998602e33be"
+   "id": "faf10d94-9bcd-42ea-a9f2-4301efe066ca"
   },
   {
    "cell_type": "markdown",

sizing/sizing_measurement_amplifier.out.ipynb

@@ -6,7 +6,7 @@
    "source": [
     "# Sizing for Measurement Amplifier"
    ],
-   "id": "46190e79-a839-4f86-b30f-a297b9fb52da"
+   "id": "3df8b19c-912a-426a-9449-ccbfff83fba3"
   },
   {
    "cell_type": "markdown",

sizing/sizing_mosfet_diode.out.ipynb

@@ -6,7 +6,7 @@
    "source": [
     "# Sizing for MOSFET Diode Example"
    ],
-   "id": "35868c35-8da7-4d4c-97b7-91614df60264"
+   "id": "1106f5a5-45ee-4c86-93a5-15f279640688"
   },
   {
    "cell_type": "markdown",

sizing/techsweep_sg13_plots_nmos.out.ipynb

@@ -6,7 +6,7 @@
    "source": [
     "# MOSFET gm/ID Evaluation Script for IHP SG13G2"
    ],
-   "id": "54bc3796-561b-4aaa-a7f3-62f1c56f513f"
+   "id": "3d0f6ff9-70c7-403a-a24a-63cc1281a96c"
   },
   {
    "cell_type": "markdown",

sizing/techsweep_sg13_plots_pmos.out.ipynb

@@ -6,7 +6,7 @@
    "source": [
     "# MOSFET gm/ID Evaluation Script for IHP SG13G2"
    ],
-   "id": "cf3bca48-4268-486b-ba32-6306120544f9"
+   "id": "9c233b3a-9e9d-4918-a940-3e9d45d328a3"
   },
   {
    "cell_type": "markdown",

sizing/techsweep_sg13_plots_triode.out.ipynb

@@ -6,7 +6,7 @@
    "source": [
     "# MOSFET gm/ID Lookup for IHP SG13G2 in Triode Region"
    ],
-   "id": "8b50ca64-a80f-441b-a493-f2857ad821f8"
+   "id": "f48895a2-728d-4d5d-a0c6-e1ba766f12e8"
   },
   {
    "cell_type": "markdown",

sizing/techsweep_sg13_txt_to_mat.out.ipynb

@@ -6,7 +6,7 @@
    "source": [
     "# Conversion of TXT to MAT for gm/ID result files for SG13G2"
    ],
-   "id": "228971ff-a3a7-42f4-a312-aee2c7c21dc7"
+   "id": "8b40dbc8-1b92-40cf-9593-6ef81fb6ca4a"
   },
   {
    "cell_type": "markdown",