pin number change

libraries/AP_HAL_ChibiOS/hwdef/JFB-X/hwdef.dat

@@ -65,7 +65,7 @@ PA14 JTCK-SWCLK SWD
 # telem1 
 PE8  UART7_TX  UART7 SPEED_VERYLOW
 PE10 UART7_CTS UART7 SPEED_VERYLOW
-PF6  UART7_RX  UART7 SPEED_VERYLOW
+PE7  UART7_RX  UART7 SPEED_VERYLOW
 PF8  UART7_RTS UART7 SPEED_VERYLOW
 
 # telem2
@@ -93,7 +93,7 @@ PE0  UART8_RX UART8 SPEED_VERYLOW   #TP3
 PE1  UART8_TX UART8 SPEED_VERYLOW
 
 # RX only, for RC input
-#PG14 USART6_TX USART6 SPEED_VERYLOW  #TP10
+PG14 USART6_TX USART6 SPEED_VERYLOW  #TP10
 PG9  USART6_RX USART6 SPEED_VERYLOW
 
 # debug uart
@@ -124,24 +124,24 @@ PA9 VBUS_RESERVED INPUT
 
 # JFB110 has SERVORAIL ADC
 PF11  SCALED_V3V3 ADC1 SCALE(2)       # ADC1_2
-#PA3  FMU_SERVORAIL_VCC_SENS ADC1 SCALE(2) # ADC1_15
+PH3  FMU_SERVORAIL_VCC_SENS ADC3 SCALE(2) # ADC3_14
 
 PC0  RSSI_IN ADC1 SCALE(1)       # ADC1_10
 define RSSI_ANA_PIN 10
 
-PC2 ADC1_6V6 ADC1 SCALE(2)       # ADC1_12
+PF6 ADC1_6V6 ADC3 SCALE(2)       # ADC3_8
 PC3 ADC1_3V3 ADC1 SCALE(1)       # ADC1_13
 
 # This defines an output pin which will default to output HIGH. It is
 # a pin that enables peripheral power on this board. It starts in the
 # off state, then is pulled low to enable peripherals in
 # peripheral_power_enable()
-PG10 nVDD_5V_HIPOWER_EN OUTPUT HIGH
-PG4  nVDD_5V_PERIPH_EN  OUTPUT HIGH
-PG12 VDD_3V3_SENSORS_EN OUTPUT LOW
+PG10 nVDD_5V_HIPOWER_EN  OUTPUT HIGH
+PG4  nVDD_5V_PERIPH_EN   OUTPUT HIGH
+PJ1  VDD_3V3_SENSORS_EN  OUTPUT LOW
 PJ5  VDD_3V3_SENSORS2_EN OUTPUT LOW
 PJ4  VDD_3V3_SENSORS3_EN OUTPUT LOW
-PG8 VDD_3V3_SENSORS4_EN OUTPUT LOW
+PG8  VDD_3V3_SENSORS4_EN OUTPUT LOW
 #VDD_3V3_SD_CARD_EN OUTPUT LOW
 
 # controlled manually
@@ -168,15 +168,20 @@ PF4 HW_VER_SENS ADC3 SCALE(1)  # ADC3_9
 PF3 HW_REV_SENS ADC3 SCALE(1)  # ADC3_5
 
 # SPI1 - IMU1(murata),MS5611(BARO),EEPROM
-PA5  SPI1_SCK     SPI1 SPEED_VERYLOW
-PB5  SPI1_MOSI    SPI1 SPEED_VERYLOW
-PA6  SPI1_MISO    SPI1 SPEED_VERYLOW
-PJ2  SCHA63T_A_CS CS   SPEED_VERYLOW  # SPI1_CS1
-PJ3  SCHA63T_G_CS CS   SPEED_VERYLOW  # SPI1_CS2
+PA5   SPI1_SCK     SPI1 SPEED_VERYLOW
+PB5   SPI1_MOSI    SPI1 SPEED_VERYLOW
+PA6   SPI1_MISO    SPI1 SPEED_VERYLOW
+PJ2   SCHA63T_A_CS CS   SPEED_VERYLOW  # SPI1_CS1
+PJ3   SCHA63T_G_CS CS   SPEED_VERYLOW  # SPI1_CS2
 PH15  MS5611_1_CS  CS   SPEED_VERYLOW  # SPI1_CS3
-PG6  AT25512_CS   CS   SPEED_VERYLOW  # SPI1_CS4
+PG6   AT25512_CS   CS   SPEED_VERYLOW  # SPI1_CS4
 
 # SPI2
+PI1 SPI2_SCK   SPI2
+PI3 SPI2_MOSI  SPI2
+PC2 SPI2_MISO  SPI2
+PI4 EXT_SPI2_CS1  CS
+PI8 EXT_SPI2_CS2  CS
 
 # SPI3 - FRAM,IMU2(42652)
 PB2  SPI3_MOSI   SPI3 SPEED_VERYLOW
@@ -193,19 +198,19 @@ PG15 MS5611_2_CS   CS   SPEED_VERYLOW  # SPI4_CS1
 PH5  IIM42652_2_CS CS   SPEED_VERYLOW  # SPI4_CS2
 
 # SPI5 - External SPI I/F
-#PF7  SPI5_SCK  SPI5 SPEED_VERYLOW
-#PH7  SPI5_MISO SPI5 SPEED_VERYLOW
-#PJ10 SPI5_MOSI SPI5 SPEED_VERYLOW
-#PE2  SPI5_CS1  CS   SPEED_VERYLOW
-#PD11 SPI5_CS2  CS
+PF7  SPI5_SCK  SPI5 SPEED_VERYLOW
+PH7  SPI5_MISO SPI5 SPEED_VERYLOW
+PJ10 SPI5_MOSI SPI5 SPEED_VERYLOW
+PE2  EXT_SPI5_CS1  CS   SPEED_VERYLOW
+PD11 EXT_SPI5_CS2  CS
 
 # IMU Device Ready Signal Input
 PA15  DRDY1_IIM42652_1 INPUT
 PF2   DRDY2_IIM42652_1 INPUT
 PK3   DRDY1_IIM42652_2 INPUT
 PK7   DRDY2_IIM42652_2 INPUT
 
-PE7  SCHA63T_RESET OUTPUT LOW
+PI15  SCHA63T_RESET OUTPUT LOW
 
 # SPI devices
 SPIDEV scha63t_g  SPI1 DEVID1  SCHA63T_G_CS  MODE0 10*MHZ 10*MHZ
@@ -362,7 +367,10 @@ PC4  ETH_RMII_RXD0     ETH1
 PC5  ETH_RMII_RXD1     ETH1
 PG11 ETH_RMII_TX_EN    ETH1
 PG13 ETH_RMII_TXD0     ETH1
-PG14 ETH_RMII_TXD1     ETH1
+PG12 ETH_RMII_TXD1     ETH1
+#PJ0 EXT_ETH_POWER_EN      ETH1
+
+PJ0 Ethernet_PWR_EN OUTPUT HIGH # disable power on ethernet
 
 define BOARD_PHY_ID  MII_LAN8742A_ID
 define BOARD_PHY_RMII