Initial commit

.gitignore

@@ -3,6 +3,7 @@
 *.lo
 *.o
 *.obj
+*.dtbo
 
 # Precompiled Headers
 *.gch
@@ -23,6 +24,5 @@
 *.lib
 
 # Executables
-*.exe
-*.out
-*.app
+*.bin
+seiscape

MH-SEISCAPE.dts

@@ -0,0 +1,95 @@
+/dts-v1/; 
+/plugin/; 
+
+/ { 
+    compatible = "ti,beaglebone", "ti,beaglebone-black", "ti,beaglebone-green"; 
+    part-number = "MH-SEISCAPE"; 
+    version = "00A0"; 
+    exclusive-use = "P8.7", "P8.9", "P9.14", "P9.27", "P9.29",
+                    "P9.30", "P9.31", "P9.41A", "P9.41B",
+                    "ehrpwm1A", "timer4", "timer5";
+
+    fragment@0 {
+        target = <&am33xx_pinmux>;
+        __overlay__ {
+            pru_adc_pins: pinmux_pru_adc_pins {
+            pinctrl-single,pins = <   // all set to slow slew rate
+                0x1a4 0x36  // /SYNC     P9_27 pr1_pru0_pru_r31_5, MODE6 | INPUT  | PU
+                0x194 0x36  // DOUT/RDY  P9_29 pr1_pru0_pru_r31_1, MODE6 | INPUT  | PU
+                0x198 0x4d  // DIN       P9_30 pr1_pru0_pru_r30_2, MODE5 | OUTPUT
+                0x190 0x4d  // SCLK      P9_31 pr1_pru0_pru_r30_0, MODE5 | OUTPUT
+            >;
+            };
+
+            pwm_tcxo_pins: pinmux_pwm_tcxo_pins {
+            pinctrl-single,pins = <
+                0x048 0x4e  // TCXO VC   P9.14 ehrpwm1a, MODE6 | OUTPUT
+            >;
+            };
+
+            timer_pins: pinmux_timer_pins {
+            pinctrl-single,pins = <
+                0x090 0x2a  // DOUT/RDY  P8_7 timer4, MODE2 | INPUT
+                0x09c 0x2a  // PPS       P8_9 timer5, MODE2 | INPUT
+                0x1b4 0x2a  // TCXO CLK  P9.41A tclkin,   MODE2 | INPUT
+                // TCLKIN is shared with P9.41B, so set it to GPIO input
+                0x1a8 0x2f  // ---       P9.41B gpio3_20, MODE7 | INPUT
+            >;
+            };
+        };
+    };
+
+
+    fragment@1 {         // Enable the PRUSS 
+        target = <&pruss>; 
+        __overlay__ { 
+            status = "okay"; 
+        }; 
+    }; 
+
+
+    fragment@2 {
+        target = <&epwmss1>;
+        __overlay__ {
+            status = "okay";
+        };
+    };
+
+
+    fragment@3 {
+        target = <&ehrpwm1>;
+        __overlay__ {
+            status = "okay";
+            pinctrl-names = "default";
+            pinctrl-0 = <&pwm_tcxo_pins>;
+        };
+    };
+
+
+    fragment@4 {
+        target = <&ocp>;
+        __overlay__ {
+            test_helper: helper {
+                compatible = "bone-pinmux-helper";
+                status = "okay";
+                pinctrl-names = "default";
+                pinctrl-0 = <&pru_adc_pins>;
+            };
+        };
+    };
+
+//    fragment@4 {
+//        target = <&ocp>;
+//        __overlay__ {
+//            pps_gmtimer {
+//                compatible = "pps-gmtimer";
+//                status = "okay";
+//                timer = <&timer5>;
+//                pinctrl-names = "default";
+//                pinctrl-0 = <&timer_pins>;
+//                use-tclkin = <1>;
+//            };
+//        };
+//    };
+};
+

Makefile

@@ -0,0 +1,16 @@
+CFLAGS+=-Wall -Werror
+LDLIBS+= -lpthread -lprussdrv
+
+all: seiscape.bin seiscape
+
+clean:
+	rm -f seiscape *.o *.bin
+
+seiscape.bin: seiscape.p
+	pasm -b $^
+
+seiscape: seiscape.o
+
+MH-SEISCAPE-00A0.dtbo: MH-SEISCAPE.dts
+	dtc -@ -I dts -O dtb -o $@ $<
+

seiscape.c

@@ -0,0 +1,115 @@
+// SeisCape ADC driver host-side code.  This loads the AD7175-2
+// bitbang assembly code into Beaglebone's PRU0.
+//
+// Inspired by Derek Molloy's PRU example code at
+// http://exploringbeaglebone.com/chapter13/#High-Speed_Analog_to_Digital_Conversion_ADC_using_the_PRU-ICSS
+//
+
+#include <stdint.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include <unistd.h>
+
+#include <prussdrv.h>
+#include <pruss_intc_mapping.h>
+
+#define PRU0    0
+#define MMAP0_LOC   "/sys/class/uio/uio0/maps/map0/"
+#define MMAP1_LOC   "/sys/class/uio/uio0/maps/map1/"
+
+// Register access sequences for the AD7175-2 are encoded as a series
+// of variable-length blocks of the form
+//
+//    Nbytes   Length of SPI bus transaction, bytes (including reg addr)
+//    Comms    Single byte to write first; contains read/write flag and reg addr
+//    Data     Up to four bytes of data to write, or space to be filled by a read
+//
+// The sequence is null-terminated (Nbytes=0).
+
+// Initialization/test sequence: read the ID register
+// Zero-pad this up to a multiple of four bytes!
+const uint8_t init_seq[] = { 3, 0x47, 0x00, 0x00,  // ID
+                             3, 0x01, 0x00, 0x08,  // ADCMODE
+                         //    3, 0x02, 0x00, 0x48,  // IFMODE
+                             3, 0x10, 0x80, 0x01,  // CH0
+                             3, 0x20, 0x13, 0x00,  // SETUPCON0
+                             3, 0x28, 0x8e, 0xa6,  // FILTCON0
+                             0, 0, 0, 0 };
+
+
+// Short function to load a single unsigned int from a sysfs entry
+unsigned int readFileValue(char filename[])
+{
+   FILE* fp;
+   unsigned int value = 0;
+   fp = fopen(filename, "rt");
+   fscanf(fp, "%x", &value);
+   fclose(fp);
+   return value;
+}
+
+
+int main()
+{
+   void *pru_dataram0;
+
+   if (getuid() != 0)
+   {
+      printf("You must run this program as root. Exiting.\n");
+      exit(EXIT_FAILURE);
+   }
+
+   // Initialize structure used by prussdrv_pruintc_intc
+   // PRUSS_INTC_INITDATA is found in pruss_intc_mapping.h
+   tpruss_intc_initdata pruss_intc_initdata = PRUSS_INTC_INITDATA;
+
+   // Read in the location and address of the shared memory. This value changes
+   // each time a new block of memory is allocated.
+   unsigned int PRU_data_addr = readFileValue(MMAP0_LOC "addr");
+   printf("-> the PRU memory is mapped at the base address: %x\n", (PRU_data_addr + 0x2000));
+
+   uint32_t ddr_addr = readFileValue(MMAP1_LOC "addr");
+   uint32_t ddr_size = readFileValue(MMAP1_LOC "size");
+   printf("The DDR External Memory pool has location: 0x%x and size: 0x%x bytes\n", ddr_addr, ddr_size);
+
+   // Allocate and initialize memory
+   prussdrv_init();
+   prussdrv_open(PRU_EVTOUT_0);
+
+   // Map the PRU0 data memory so we can read it later.
+   if (prussdrv_map_prumem(PRUSS0_PRU0_DATARAM, &pru_dataram0) == -1)
+   {
+       printf("PRUSS0_PRU0_DATARAM map failed\n");
+       exit(EXIT_FAILURE);
+   }
+
+   // Write the AD7175-2 initialization sequence into PRU0 Data RAM0.
+   // You can edit the value to PRUSS0_PRU1_DATARAM if you wish to
+   // write to PRU1.
+//   unsigned int *tmp = (unsigned int *) init_seq;
+//   prussdrv_pru_write_memory(PRUSS0_PRU0_DATARAM, 0, tmp, sizeof(init_seq));
+   memcpy(pru_dataram0, init_seq, sizeof(init_seq));
+
+   // Map the PRU's interrupts
+   prussdrv_pruintc_init(&pruss_intc_initdata);
+
+   // Load and execute the PRU program on the PRU
+   prussdrv_exec_program(PRU0, "./seiscape.bin");
+
+   // Wait for event completion from PRU, returns the PRU_EVTOUT_0 number
+   int n = prussdrv_pru_wait_event(PRU_EVTOUT_0);
+   printf("PRU0 program completed, event number %d.\n", n);
+
+   // Read the results of the AD7175-2 init seq
+   printf("Register R/W results 0x%x 0x%x 0x%x 0x%x 0x%x\n", (unsigned int) ((uint32_t *)pru_dataram0)[0],
+                                                             (unsigned int) ((uint32_t *)pru_dataram0)[1],
+                                                             (unsigned int) ((uint32_t *)pru_dataram0)[2],
+                                                             (unsigned int) ((uint32_t *)pru_dataram0)[3],
+                                                             (unsigned int) ((uint32_t *)pru_dataram0)[4]);
+
+   // Disable PRU and close memory mappings
+   prussdrv_pru_disable(PRU0);
+   prussdrv_exit();
+   return EXIT_SUCCESS;
+}