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refactor memory handler
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krzys9876 committed Mar 31, 2023
1 parent 5362f0d commit 8ebfa92
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Showing 11 changed files with 62 additions and 70 deletions.
7 changes: 5 additions & 2 deletions build.sbt
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
name := "z80_sim"
ThisBuild / version := "0.0.11"
ThisBuild / version := "0.0.12"
ThisBuild / versionScheme := Some("early-semver")

scalaVersion := "2.13.10"
Expand All @@ -10,7 +10,10 @@ libraryDependencies ++= Seq(
"org.scalatest" %% "scalatest" % "3.2.15" % Test
)

ThisBuild / scalacOptions ++= Seq("-deprecation", "-feature")
ThisBuild / scalacOptions ++= Seq("-deprecation", "-feature", "-opt:l:inline", "-opt:simplify-jumps", "-opt:redundant-casts", "-opt:box-unbox", "-opt-inline-from:**")
//ThisBuild / scalacOptions ++= Seq("-deprecation", "-feature")
//ThisBuild / scalacOptions ++= Seq("-deprecation", "-feature", "-opt:l:inline", "-opt-inline-from:**")
//ThisBuild / scalacOptions ++= Seq("-deprecation", "-feature", "-opt:redundant-casts")

// set main class
assembly / mainClass := Some("org.kr.scala.z80.Main")
Expand Down
18 changes: 9 additions & 9 deletions run.bat
Original file line number Diff line number Diff line change
@@ -1,11 +1,11 @@
echo off
cls
rem java.exe -XX:+UseSerialGC -jar target\scala-2.13\z80_sim-assembly-0.0.11.jar --mode interactive --hex-file "input-files\basicall_KR_simpleIO.hex" --basic-file "input-files\waves.txt" --memory-type slow
java.exe -XX:+UseSerialGC -jar target\scala-2.13\z80_sim-assembly-0.0.11.jar --mode interactive --hex-file "input-files\basicall_KR_simpleIO.hex" --basic-file "input-files\waves.txt" --memory-type fast
rem java.exe -XX:+UseSerialGC -jar target\scala-2.13\z80_sim-assembly-0.0.11.jar --mode batch --hex-file "input-files\basicall_KR_simpleIO.hex" --basic-file "input-files\waves.txt" --steps-m 250
rem java.exe -XX:+UseSerialGC -jar target\scala-2.13\z80_sim-assembly-0.0.11.jar --mode interactive --hex-file input-files\basicall_KR_simpleIO.hex --basic-file input-files\tictactoe10.txt
rem java.exe -XX:+UseSerialGC -jar target\scala-2.13\z80_sim-assembly-0.0.11.jar --mode interactive --hex-file input-files\basicall_KR_simpleIO.hex --basic-file input-files\tictactoe10.txt --steps-m 3600 --memory-type fast
rem java.exe -XX:+UseSerialGC -jar target\scala-2.13\z80_sim-assembly-0.0.11.jar --mode batch --hex-file input-files\basicall_KR_simpleIO.hex --basic-file input-files\input.txt --steps-m 0.45
rem java.exe -XX:+UseSerialGC -jar target\scala-2.13\z80_sim-assembly-0.0.11.jar --mode batch --hex-file "input-files\basicall_KR_simpleIO.hex" --basic-file "input-files\arithmetic.txt" --steps-m 1.4 --memory-type fast
rem java.exe -XX:+UseSerialGC -jar target\scala-2.13\z80_sim-assembly-0.0.11.jar --mode batch --hex-file "input-files\basicall_KR_simpleIO.hex" --basic-file "input-files\arithmetic2.txt" --steps-m 1.4 --memory-type fast
rem java.exe -XX:+UseSerialGC -jar target\scala-2.13\z80_sim-assembly-0.0.11.jar --mode interactive --hex-file "input-files\basicall_KR_simpleIO.hex" --memory-type fast
rem java.exe -XX:+UseSerialGC -jar target\scala-2.13\z80_sim-assembly-0.0.12.jar --mode interactive --hex-file "input-files\basicall_KR_simpleIO.hex" --basic-file "input-files\waves.txt" --memory-type slow
rem java.exe -XX:+UseSerialGC -jar target\scala-2.13\z80_sim-assembly-0.0.12.jar --mode interactive --hex-file "input-files\basicall_KR_simpleIO.hex" --basic-file "input-files\waves.txt" --memory-type fast
rem java.exe -XX:+UseSerialGC -jar target\scala-2.13\z80_sim-assembly-0.0.12.jar --mode batch --hex-file "input-files\basicall_KR_simpleIO.hex" --basic-file "input-files\waves.txt" --memory-type fast --steps-m 250
rem java.exe -XX:+UseSerialGC -jar target\scala-2.13\z80_sim-assembly-0.0.12.jar --mode interactive --hex-file input-files\basicall_KR_simpleIO.hex --basic-file input-files\tictactoe10.txt
rem java.exe -XX:+UseSerialGC -jar target\scala-2.13\z80_sim-assembly-0.0.12.jar --mode interactive --hex-file input-files\basicall_KR_simpleIO.hex --basic-file input-files\tictactoe10.txt --steps-m 3600 --memory-type fast
rem java.exe -XX:+UseSerialGC -jar target\scala-2.13\z80_sim-assembly-0.0.12.jar --mode batch --hex-file input-files\basicall_KR_simpleIO.hex --basic-file input-files\input.txt --memory-type fast --steps-m 0.45
java.exe -XX:+UseSerialGC -jar target\scala-2.13\z80_sim-assembly-0.0.12.jar --mode batch --hex-file "input-files\basicall_KR_simpleIO.hex" --basic-file "input-files\arithmetic.txt" --steps-m 1.4 --memory-type fast
rem java.exe -XX:+UseSerialGC -jar target\scala-2.13\z80_sim-assembly-0.0.12.jar --mode batch --hex-file "input-files\basicall_KR_simpleIO.hex" --basic-file "input-files\arithmetic2.txt" --steps-m 1.4 --memory-type fast
rem java.exe -XX:+UseSerialGC -jar target\scala-2.13\z80_sim-assembly-0.0.12.jar --mode interactive --hex-file "input-files\basicall_KR_simpleIO.hex" --memory-type fast
8 changes: 4 additions & 4 deletions src/main/scala/org/kr/scala/z80/Main.scala
Original file line number Diff line number Diff line change
Expand Up @@ -27,8 +27,8 @@ object Main extends App {
implicit val debugger:Debugger=ConsoleDebugger
// memory
implicit val memoryHandler:MemoryHandler = clArgs.memoryType().toLowerCase match {
case "slow" | "s" => ImmutableMemory
case _ => MutableMemory
case "slow" | "s" => new ImmutableMemoryHandler()
case _ => new MutableMemoryHandler()
}
val memory=prepareMemory(clArgs.hexFile())
// input keys sequence
Expand Down Expand Up @@ -63,8 +63,8 @@ object Main extends App {

private def prepareMemory(hexFile: String)(implicit memoryHandler:MemoryHandler): MemoryContents =
(StateWatcher(memoryHandler.blank(0x10000)) >>==
ImmutableMemory.loadHexLines(readFile(hexFile)) >>==
ImmutableMemory.lockTo(0x2000))
memoryHandler.loadHexLines(readFile(hexFile)) >>==
memoryHandler.lockTo(0x2000))
.state

private def prepareInputFromFile(inputTextFile:String):InputFile={
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -14,18 +14,6 @@ class ImmutableMemory(override val copy: Vector[Int], val size:Int, override val
new ImmutableMemory(copy.slice(0,address) ++ values ++ copy.slice(address+values.size,size),size,lock)
}

object ImmutableMemory extends MemoryHandler {
override def blank(size:Int):MemoryContents=new ImmutableMemory(Vector.fill(size)(0),size)
def preloaded(initial:Vector[Int],size:Int):MemoryContents= new ImmutableMemory(initial++Vector.fill(size-initial.size)(0),size)
// functions changing state (Memory=>Memory)
override def poke: (Int, Int) => MemoryContents => MemoryContents = (address, value) => memory => memory.poke(address, value)
override def pokeW: (Int, Int) => MemoryContents => MemoryContents = (address, value) => memory => memory.pokeW(address, value)
override def pokeMulti: (Int, Vector[Int]) => MemoryContents => MemoryContents = (address, values) => memory => memory.pokeMulti(address, values)
override def loadHexLines: List[String] => MemoryContents => MemoryContents = lines => memory => memory.loadHexLines(lines)
override def lockTo: Int => MemoryContents => MemoryContents = upperAddressExcl => memory => memory.lock(AddressRange(0,upperAddressExcl))
override def lock: AddressRange => MemoryContents => MemoryContents = range => memory => memory.lock(range)
}

class MutableMemory(val initial: Vector[Int], val size:Int, var lockRange: AddressRange=AddressRange.empty) extends MemoryContents {
override def lock:AddressRange=lockRange
private val data: MemoryArray = new MemoryArray(size,initial.toArray)
Expand All @@ -46,28 +34,27 @@ class MutableMemory(val initial: Vector[Int], val size:Int, var lockRange: Addre
}
}

object MutableMemory extends MemoryHandler {
override def blank(size:Int):MemoryContents=new MutableMemory(Vector.fill(size)(0),size)
def preloaded(initial:Vector[Int],size:Int):MemoryContents= new MutableMemory(initial++Vector.fill(size-initial.size)(0),size)
// functions changing state (Memory=>Memory)
override def poke: (Int, Int) => MemoryContents => MemoryContents = (address, value) => memory => memory.poke(address, value)
override def pokeW: (Int, Int) => MemoryContents => MemoryContents = (address, value) => memory => memory.pokeW(address, value)
override def pokeMulti: (Int, Vector[Int]) => MemoryContents => MemoryContents = (address, values) => memory => memory.pokeMulti(address, values)
override def loadHexLines: List[String] => MemoryContents => MemoryContents = lines => memory => memory.loadHexLines(lines)
override def lockTo: Int => MemoryContents => MemoryContents = upperAddressExcl => memory => memory.lock(AddressRange(0, upperAddressExcl))
override def lock: AddressRange => MemoryContents => MemoryContents = range => memory => memory.lock(range)
class ImmutableMemoryHandler extends MemoryHandler {
override def blank(size:Int):ImmutableMemory=new ImmutableMemory(Vector.fill(size)(0),size)
override def preloaded(initial:Vector[Int],size:Int):ImmutableMemory= new ImmutableMemory(initial++Vector.fill(size-initial.size)(0),size)
}

class MutableMemoryHandler extends MemoryHandler {
override def blank(size:Int):MutableMemory=new MutableMemory(Vector.fill(size)(0),size)
override def preloaded(initial:Vector[Int],size:Int):MutableMemory= new MutableMemory(initial++Vector.fill(size-initial.size)(0),size)
}


trait MemoryHandler {
def blank(size: Int): MemoryContents
def preloaded(initial: Vector[Int], size: Int): MemoryContents
// functions changing state (Memory=>Memory)
def poke: (Int, Int) => MemoryContents => MemoryContents
def pokeW: (Int, Int) => MemoryContents => MemoryContents
def pokeMulti: (Int, Vector[Int]) => MemoryContents => MemoryContents
def loadHexLines: List[String] => MemoryContents => MemoryContents
def lockTo: Int => MemoryContents => MemoryContents
def lock: AddressRange => MemoryContents => MemoryContents
def poke: (Int, Int) => MemoryContents => MemoryContents = (address, value) => memory => memory.poke(address, value)
def pokeW: (Int, Int) => MemoryContents => MemoryContents = (address, value) => memory => memory.pokeW(address, value)
def pokeMulti: (Int, Vector[Int]) => MemoryContents => MemoryContents = (address, values) => memory => memory.pokeMulti(address, values)
def loadHexLines: List[String] => MemoryContents => MemoryContents = lines => memory => memory.loadHexLines(lines)
def lockTo: Int => MemoryContents => MemoryContents = upperAddressExcl => memory => memory.lock(AddressRange(0, upperAddressExcl))
def lock: AddressRange => MemoryContents => MemoryContents = range => memory => memory.lock(range)
}

trait MemoryContents {
Expand Down
20 changes: 11 additions & 9 deletions src/test/scala/org/kr/scala/z80/test/HexLoaderTest.scala
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
package org.kr.scala.z80.test

import org.kr.scala.z80.system.{Debugger, DummyDebugger, ImmutableMemory, MemoryContents, StateWatcher}
import org.kr.scala.z80.system.{Debugger, DummyDebugger, ImmutableMemoryHandler, MemoryContents, StateWatcher}
import org.scalatest.BeforeAndAfterAll
import org.scalatest.funsuite.AnyFunSuite

Expand All @@ -19,12 +19,14 @@ class HexLoaderTest extends AnyFunSuite with BeforeAndAfterAll {

override def afterAll(): Unit = {}

val memoryHandler = new ImmutableMemoryHandler()


test("load single line") {
//given
val mem=StateWatcher[MemoryContents](ImmutableMemory.blank(0x100))
val mem=StateWatcher[MemoryContents](memoryHandler.blank(0x100))
//when
val memLoaded=mem >>== ImmutableMemory.loadHexLines(List(":10004000282DDB81F53A4320FE3F2003F118202ABA"))
val memLoaded=mem >>== memoryHandler.loadHexLines(List(":10004000282DDB81F53A4320FE3F2003F118202ABA"))
//then
assert(memLoaded.get(0x0040)==0x28)
assert(memLoaded.get(0x0041)==0x2D)
Expand All @@ -34,9 +36,9 @@ class HexLoaderTest extends AnyFunSuite with BeforeAndAfterAll {

test("load multiple lines") {
//given
val mem=StateWatcher[MemoryContents](ImmutableMemory.blank(0x100))
val mem=StateWatcher[MemoryContents](memoryHandler.blank(0x100))
//when
val memLoaded=mem >>== ImmutableMemory.loadHexLines(
val memLoaded=mem >>== memoryHandler.loadHexLines(
List(
":10000000F3C3B80000000000C39F00000000000020",
":10001000C374000000000000C3AA0000000000003C",
Expand All @@ -57,9 +59,9 @@ class HexLoaderTest extends AnyFunSuite with BeforeAndAfterAll {

test("load ending line") {
//given
val mem=StateWatcher[MemoryContents](ImmutableMemory.blank(0x100))
val mem=StateWatcher[MemoryContents](memoryHandler.blank(0x100))
//when
val memLoaded=mem >>== ImmutableMemory.loadHexLines(List(":00000001FF"))
val memLoaded=mem >>== memoryHandler.loadHexLines(List(":00000001FF"))
//then
assert(memLoaded.get(0x0000)==0x00)
assert(memLoaded.get(0x0001)==0x00)
Expand Down Expand Up @@ -88,10 +90,10 @@ class HexLoaderTest extends AnyFunSuite with BeforeAndAfterAll {
if(Files.exists(tmpFilePath)) Files.delete(tmpFilePath)

saveToFile(tmpFilePath,lines)
val mem=StateWatcher[MemoryContents](ImmutableMemory.blank(0x100))
val mem=StateWatcher[MemoryContents](memoryHandler.blank(0x100))
//when
val linesFromFile=Files.readAllLines(tmpFilePath).asScala.toList
val memLoaded=mem >>== ImmutableMemory.loadHexLines(linesFromFile)
val memLoaded=mem >>== memoryHandler.loadHexLines(linesFromFile)
//then
assert(memLoaded.get(0x0000)==0xF3)
assert(memLoaded.get(0x0001)==0xC3)
Expand Down
14 changes: 7 additions & 7 deletions src/test/scala/org/kr/scala/z80/test/InterruptTest.scala
Original file line number Diff line number Diff line change
@@ -1,13 +1,13 @@
package org.kr.scala.z80.test

import org.kr.scala.z80.system.{CyclicInterrupt, Debugger, DummyDebugger, ImmutableMemory, InputFile, MemoryHandler, OutputFile, Register, Regs, StateWatcher, Z80System}
import org.kr.scala.z80.system.{CyclicInterrupt, Debugger, DummyDebugger, ImmutableMemoryHandler, InputFile, MemoryHandler, OutputFile, Register, Regs, StateWatcher, Z80System}
import org.kr.scala.z80.utils.{AnyInt, IntValue}
import org.scalatest.funsuite.AnyFunSuite

class InterruptTest extends AnyFunSuite {

implicit val debugger:Debugger=DummyDebugger
implicit val memoryHandler:MemoryHandler=ImmutableMemory
implicit val memoryHandler:MemoryHandler=new ImmutableMemoryHandler()

test("run EI / DI") {
TestUtils.testRegOrAddrWithFlags(List((Regs.F, 0x00), (Regs.IFF, 0x00), (Regs.PC, 0x0100)), List((0x0100, 0xFB)),
Expand Down Expand Up @@ -45,7 +45,7 @@ class InterruptTest extends AnyFunSuite {

test("trigger interrupt (IM 1)") {
//given
val sysBlank=new Z80System(ImmutableMemory.blank(0x0100),Register.blank,OutputFile.blank,InputFile.blank,
val sysBlank=new Z80System(memoryHandler.blank(0x0100),Register.blank,OutputFile.blank,InputFile.blank,
0,CyclicInterrupt(50))
val memList=interruptTestProgram
val regList=List((Regs.IFF,1),(Regs.IM,1),(Regs.SP,0x00FF),(Regs.A,0x00))
Expand All @@ -70,7 +70,7 @@ class InterruptTest extends AnyFunSuite {
}
test("trigger interrupt (IM 0) - unsupported") {
//given
val sysBlank = new Z80System(ImmutableMemory.blank(0x0100), Register.blank, OutputFile.blank, InputFile.blank,
val sysBlank = new Z80System(memoryHandler.blank(0x0100), Register.blank, OutputFile.blank, InputFile.blank,
0, CyclicInterrupt(50))
val memList = interruptTestProgram
val regList = List((Regs.IFF, 1), (Regs.IM, 0), (Regs.SP, 0x00FF), (Regs.A, 0x00))
Expand All @@ -80,7 +80,7 @@ class InterruptTest extends AnyFunSuite {
}
test("do not trigger interrupt when IFF is 0") {
//given
val sysBlank = new Z80System(ImmutableMemory.blank(0x0100), Register.blank, OutputFile.blank, InputFile.blank,
val sysBlank = new Z80System(memoryHandler.blank(0x0100), Register.blank, OutputFile.blank, InputFile.blank,
0, CyclicInterrupt(50))
val memList = interruptTestProgram
val regList = List((Regs.IFF, 0), (Regs.IM, 1), (Regs.SP, 0x00FF), (Regs.A, 0x00))
Expand All @@ -93,7 +93,7 @@ class InterruptTest extends AnyFunSuite {
}
test("run HALT w/o interrupts") {
//given
val sysBlank = new Z80System(ImmutableMemory.blank(0x0100), Register.blank, OutputFile.blank, InputFile.blank,
val sysBlank = new Z80System(memoryHandler.blank(0x0100), Register.blank, OutputFile.blank, InputFile.blank,
0, CyclicInterrupt(50))
val memList = List((0x0000,0x76)) // HALT
val regList = List((Regs.IFF, 0), (Regs.IM, 0), (Regs.SP, 0x00FF), (Regs.A, 0x00))
Expand All @@ -106,7 +106,7 @@ class InterruptTest extends AnyFunSuite {
}
test("run HALT with interrupts") {
//given
val sysBlank = new Z80System(ImmutableMemory.blank(0x0100), Register.blank, OutputFile.blank, InputFile.blank,
val sysBlank = new Z80System(memoryHandler.blank(0x0100), Register.blank, OutputFile.blank, InputFile.blank,
0, CyclicInterrupt(40))
val memList = List((0x0000, 0x76),(0x0038, 0xED), (0x0039, 0x4D)) // HALT + RETI (the whole interrupt routine is RETI)
val regList = List((Regs.IFF, 1), (Regs.IM, 1), (Regs.SP, 0x00FF), (Regs.A, 0x00))
Expand Down
4 changes: 2 additions & 2 deletions src/test/scala/org/kr/scala/z80/test/MemoryTest.scala
Original file line number Diff line number Diff line change
Expand Up @@ -6,8 +6,8 @@ import org.scalatest.funsuite.AnyFunSuite
class MemoryTest extends AnyFunSuite {
implicit val debugger:Debugger=DummyDebugger

testAll(ImmutableMemory,"immutable")
testAll(MutableMemory,"mutable")
testAll(new ImmutableMemoryHandler(),"immutable")
testAll(new MutableMemoryHandler(),"mutable")

def testAll(implicit memoryHandler: MemoryHandler,prefix:String):Unit = {
test(f"init blank memory ($prefix)") {
Expand Down
4 changes: 2 additions & 2 deletions src/test/scala/org/kr/scala/z80/test/OpBasicTest.scala
Original file line number Diff line number Diff line change
@@ -1,11 +1,11 @@
package org.kr.scala.z80.test

import org.kr.scala.z80.system.{Debugger, DummyDebugger, ImmutableMemory, MemoryHandler, Regs, StateWatcher, Z80System}
import org.kr.scala.z80.system.{Debugger, DummyDebugger, ImmutableMemory, ImmutableMemoryHandler, MemoryHandler, Regs, StateWatcher, Z80System}
import org.scalatest.funsuite.AnyFunSuite

class OpBasicTest extends AnyFunSuite {
implicit val debugger:Debugger=DummyDebugger
implicit val memoryHandler:MemoryHandler=ImmutableMemory
implicit val memoryHandler:MemoryHandler=new ImmutableMemoryHandler()

// TEST NOP
test("run NOP and move PC") {
Expand Down
4 changes: 2 additions & 2 deletions src/test/scala/org/kr/scala/z80/test/OpInOutTest.scala
Original file line number Diff line number Diff line change
@@ -1,12 +1,12 @@
package org.kr.scala.z80.test

import org.kr.scala.z80.system.{ConsoleDebugger, ConsoleDetailedDebugger, Debugger, DummyDebugger, ImmutableMemory, InputPort, InputPortConstant, InputPortSequential, MemoryHandler, PortID, RegSymbol, Regs, StateWatcher, Z80System}
import org.kr.scala.z80.system.{ConsoleDebugger, ConsoleDetailedDebugger, Debugger, DummyDebugger, ImmutableMemory, ImmutableMemoryHandler, InputPort, InputPortConstant, InputPortSequential, MemoryHandler, PortID, RegSymbol, Regs, StateWatcher, Z80System}
import org.scalatest.funsuite.AnyFunSuite

class OpInOutTest extends AnyFunSuite {

implicit val debugger:Debugger=ConsoleDetailedDebugger
implicit val memoryHandler:MemoryHandler=ImmutableMemory
implicit val memoryHandler:MemoryHandler=new ImmutableMemoryHandler()

test("run OUT (n),A (8-bit IO mode only)") {
//given
Expand Down
4 changes: 2 additions & 2 deletions src/test/scala/org/kr/scala/z80/test/SystemTest.scala
Original file line number Diff line number Diff line change
@@ -1,12 +1,12 @@
package org.kr.scala.z80.test

import org.kr.scala.z80.system.{Debugger, DummyDebugger, ImmutableMemory, MemoryChangeByte, MemoryChangeWord, MemoryHandler, RegisterChange, RegisterChangeRelative, Regs, StateWatcher, Z80System}
import org.kr.scala.z80.system.{Debugger, DummyDebugger, ImmutableMemory, ImmutableMemoryHandler, MemoryChangeByte, MemoryChangeWord, MemoryHandler, RegisterChange, RegisterChangeRelative, Regs, StateWatcher, Z80System}
import org.scalatest.funsuite.AnyFunSuite

class SystemTest extends AnyFunSuite {

implicit val debugger:Debugger=DummyDebugger
implicit val memoryHander:MemoryHandler=ImmutableMemory
implicit val memoryHander:MemoryHandler=new ImmutableMemoryHandler()

test("change memory (byte)") {
//given
Expand Down
6 changes: 3 additions & 3 deletions src/test/scala/org/kr/scala/z80/test/TestUtils.scala
Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
package org.kr.scala.z80.test

import org.kr.scala.z80.system.{Debugger, Flag, ImmutableMemory, MemoryHandler, RegSymbol, Register, Regs, StateWatcher, Z80System}
import org.kr.scala.z80.system.{Debugger, Flag, ImmutableMemory, ImmutableMemoryHandler, MemoryHandler, RegSymbol, Register, Regs, StateWatcher, Z80System}
import org.kr.scala.z80.utils.{IntValue, OptionInt, Z80Utils}

object TestUtils {
Expand All @@ -13,7 +13,7 @@ object TestUtils {
assert(reg(Flag.C) == Z80Utils.getBitFromString(flagsAsString, Flag.C.bit))
}

implicit val memoryHandler:MemoryHandler = ImmutableMemory
implicit val memoryHandler:MemoryHandler = new ImmutableMemoryHandler()

def prepareTest(regList: List[(RegSymbol, Int)], memList: List[(Int, Int)], steps:Int=1)
(implicit debugger:Debugger): StateWatcher[Z80System] = {
Expand All @@ -28,7 +28,7 @@ object TestUtils {
)

val mem = memList.foldLeft(StateWatcher(sysBlank.get.memory))(
(memC, entry) => memC >>== ImmutableMemory.poke(entry._1, entry._2)
(memC, entry) => memC >>== memoryHandler.poke(entry._1, entry._2)
)
//when
val sysInit = StateWatcher[Z80System](new Z80System(mem.get, reg.get,sysBlank.get.output, sysBlank.get.input,
Expand Down

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