[RFC] SCMI PTA with OCALL

Documentation/devicetree/bindings/arm/arm,scmi.txt

@@ -14,10 +14,11 @@ Required properties:
 
 The scmi node with the following properties shall be under the /firmware/ node.
 
-- compatible : shall be "arm,scmi" or "arm,scmi-smc" for smc/hvc transports
-- mboxes: List of phandle and mailbox channel specifiers. It should contain
-	  exactly one or two mailboxes, one for transmitting messages("tx")
-	  and another optional for receiving the notifications("rx") if
+- compatible : shall be "arm,scmi" or "arm,scmi-smc" for smc/hvc transports,
+	  or "linaro,scmi-optee" for OP-TEE transport.
+- mboxes: List of phandle and mailbox channel specifiers. When used, it should
+	  contain exactly one or two mailboxes, one for transmitting messages
+	  ("tx") and another optional for receiving the notifications("rx") if
 	  supported.
 - shmem : List of phandle pointing to the shared memory(SHM) area as per
 	  generic mailbox client binding.
@@ -26,6 +27,7 @@ The scmi node with the following properties shall be under the /firmware/ node.
 - #size-cells : should be '0' as 'reg' property doesn't have any size
 	  associated with it.
 - arm,smc-id : SMC id required when using smc or hvc transports
+- linaro,channel-id : Channel ID required when using OP-TEE transports
 
 Optional properties:
 

arch/arm/boot/dts/stm32mp151.dtsi

@@ -28,6 +28,14 @@
 		method = "smc";
 	};
 
+	firmware {
+		optee: optee {
+			compatible = "linaro,optee-tz";
+			method = "smc";
+			status = "disabled";
+		};
+	};
+
 	intc: interrupt-controller@a0021000 {
 		compatible = "arm,cortex-a7-gic";
 		#interrupt-cells = <3>;

arch/arm/boot/dts/stm32mp157c-dk2.dts

@@ -16,6 +16,13 @@
 	model = "STMicroelectronics STM32MP157C-DK2 Discovery Board";
 	compatible = "st,stm32mp157c-dk2", "st,stm32mp157";
 
+	reserved-memory {
+		optee_memory: optee@0xde000000 {
+			reg = <0xde000000 0x02000000>;
+			no-map;
+		};
+	};
+
 	aliases {
 		ethernet0 = &ethernet0;
 		serial0 = &uart4;
@@ -95,3 +102,7 @@
 	pinctrl-2 = <&usart2_idle_pins_c>;
 	status = "disabled";
 };
+
+&optee {
+	status = "okay";
+};

arch/arm/boot/dts/stm32mp157c-ev1.dts

@@ -372,3 +372,7 @@
 &usbphyc {
 	status = "okay";
 };
+
+&optee {
+	status = "okay";
+};

arch/arm64/boot/dts/arm/foundation-v8.dtsi

@@ -22,11 +22,14 @@
 
 	aliases {
 		serial0 = &v2m_serial0;
-		serial1 = &v2m_serial1;
 		serial2 = &v2m_serial2;
 		serial3 = &v2m_serial3;
 	};
 
+	ftpm {
+	        compatible = "microsoft,ftpm";
+	};
+
 	cpus {
 		#address-cells = <2>;
 		#size-cells = <0>;
@@ -67,6 +70,17 @@
 		      <0x00000008 0x80000000 0 0x80000000>;
 	};
 
+	reserved-memory {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		optee@0x83000000 {
+			reg = <0x00000000 0x83000000 0 0x01000000>;
+			no-map;
+		};
+	};
+
 	timer {
 		compatible = "arm,armv8-timer";
 		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
@@ -197,14 +211,6 @@
 				clock-names = "uartclk", "apb_pclk";
 			};
 
-			v2m_serial1: serial@a0000 {
-				compatible = "arm,pl011", "arm,primecell";
-				reg = <0x0a0000 0x1000>;
-				interrupts = <6>;
-				clocks = <&v2m_clk24mhz>, <&v2m_clk24mhz>;
-				clock-names = "uartclk", "apb_pclk";
-			};
-
 			v2m_serial2: serial@b0000 {
 				compatible = "arm,pl011", "arm,primecell";
 				reg = <0x0b0000 0x1000>;
@@ -228,4 +234,12 @@
 			};
 		};
 	};
+
+	firmware {
+		optee {
+			compatible = "linaro,optee-tz";
+			method = "smc";
+		};
+	};
+
 };

arch/arm64/boot/dts/arm/juno-base.dtsi

@@ -800,6 +800,18 @@
 		      <0x00000008 0x80000000 0x1 0x80000000>;
 	};
 
+	reserved-memory {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		/* Shared memory between secure and non-secure world */
+		optee@0xfee00000 {
+			reg = <0x00000000 0xfee00000 0 0x00200000>;
+			no-map;
+		};
+	};
+
 	bus@8000000 {
 		compatible = "simple-bus";
 		#address-cells = <2>;
@@ -837,4 +849,11 @@
 		interrupt-map-mask = <0 0>;
 		interrupt-map = <0 0 &gic 0 GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
 	};
+
+	firmware {
+		optee {
+			compatible = "linaro,optee-tz";
+			method = "smc";
+		};
+	};
 };

arch/arm64/boot/dts/hisilicon/hi3798cv200-poplar.dts

@@ -6,6 +6,7 @@
  */
 
 /dts-v1/;
+/memreserve/ 0x00000000 0x04080000;
 
 #include <dt-bindings/gpio/gpio.h>
 #include "hi3798cv200.dtsi"
@@ -70,6 +71,13 @@
 		gpio = <&gpio6 7 0>;
 		enable-active-high;
 	};
+
+	firmware {
+		optee {
+			compatible = "linaro,optee-tz";
+			method = "smc";
+		};
+	};
 };
 
 &ehci {

arch/arm64/boot/dts/mediatek/mt8173-evb.dts

@@ -60,6 +60,13 @@
 		gpio = <&pio 9 GPIO_ACTIVE_HIGH>;
 		enable-active-high;
 	};
+
+	firmware {
+		optee {
+			compatible = "linaro,optee-tz";
+			method = "smc";
+		};
+	};
 };
 
 &cec {

arch/arm64/boot/dts/mediatek/mt8173.dtsi

@@ -468,15 +468,6 @@
 			reg = <0 0x10007000 0 0x100>;
 		};
 
-		timer: timer@10008000 {
-			compatible = "mediatek,mt8173-timer",
-				     "mediatek,mt6577-timer";
-			reg = <0 0x10008000 0 0x1000>;
-			interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_LOW>;
-			clocks = <&infracfg CLK_INFRA_CLK_13M>,
-				 <&topckgen CLK_TOP_RTC_SEL>;
-		};
-
 		pwrap: pwrap@1000d000 {
 			compatible = "mediatek,mt8173-pwrap";
 			reg = <0 0x1000d000 0 0x1000>;

drivers/firmware/Kconfig

@@ -9,7 +9,7 @@ menu "Firmware Drivers"
 config ARM_SCMI_PROTOCOL
 	bool "ARM System Control and Management Interface (SCMI) Message Protocol"
 	depends on ARM || ARM64 || COMPILE_TEST
-	depends on MAILBOX
+	depends on MAILBOX || HAVE_ARM_SMCCC_DISCOVERY || OPTEE
 	help
 	  ARM System Control and Management Interface (SCMI) protocol is a
 	  set of operating system-independent software interfaces that are

drivers/firmware/arm_scmi/Makefile

@@ -5,5 +5,6 @@ scmi-driver-y = driver.o notify.o
 scmi-transport-y = shmem.o
 scmi-transport-$(CONFIG_MAILBOX) += mailbox.o
 scmi-transport-$(CONFIG_HAVE_ARM_SMCCC_DISCOVERY) += smc.o
+scmi-transport-$(CONFIG_OPTEE) += optee_service.o
 scmi-protocols-y = base.o clock.o perf.o power.o reset.o sensors.o
 obj-$(CONFIG_ARM_SCMI_POWER_DOMAIN) += scmi_pm_domain.o

drivers/firmware/arm_scmi/common.h

@@ -217,9 +217,12 @@ struct scmi_desc {
 };
 
 extern const struct scmi_desc scmi_mailbox_desc;
-#ifdef CONFIG_HAVE_ARM_SMCCC
+#ifdef CONFIG_HAVE_ARM_SMCCC_DISCOVERY
 extern const struct scmi_desc scmi_smc_desc;
 #endif
+#ifdef CONFIG_OPTEE
+extern const struct scmi_desc scmi_optee_desc;
+#endif
 
 void scmi_rx_callback(struct scmi_chan_info *cinfo, u32 msg_hdr);
 void scmi_free_channel(struct scmi_chan_info *cinfo, struct idr *idr, int id);

drivers/firmware/arm_scmi/driver.c

@@ -912,6 +912,9 @@ static const struct of_device_id scmi_of_match[] = {
 	{ .compatible = "arm,scmi", .data = &scmi_mailbox_desc },
 #ifdef CONFIG_HAVE_ARM_SMCCC_DISCOVERY
 	{ .compatible = "arm,scmi-smc", .data = &scmi_smc_desc},
+#endif
+#ifdef CONFIG_OPTEE
+	{ .compatible = "linaro,scmi-optee", .data = &scmi_optee_desc },
 #endif
 	{ /* Sentinel */ },
 };