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Fixed Verilog netlist export with presence of unconnected plugs #96

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merged 2 commits into from
Dec 7, 2023
Merged

Fixed Verilog netlist export with presence of unconnected plugs #96

merged 2 commits into from
Dec 7, 2023

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lanserge
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@lanserge lanserge commented Dec 6, 2023 •
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Check added: if unconnected plug returns 0 when plug->getNet() called.
Also made port be output by default when net direction undefined.

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github-actions bot commented Dec 6, 2023 •
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A preview of ee22519 is uploaded and can be seen here:

✨ https://lip6.github.io/coriolis/pull/96/ ✨

Changes may take a few minutes to propagate. Since this is a preview of production, content with draft: true will not be rendered. The source is here: https://github.com/lip6/coriolis/tree/gh-pages/pull/96/

Coloquinte
Coloquinte approved these changes Dec 7, 2023
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Thank you!
Is there a particular reason to assume output rather than in or inout?

@lanserge lanserge merged commit 214b36e into main Dec 7, 2023
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@lanserge lanserge deleted the verilog branch December 7, 2023 14:07
jpc-lip6 pushed a commit that referenced this pull request Jan 16, 2024
@lanserge @jpc-lip6
Fixed Verilog netlist export with presence of unconnected plugs (#96)
4d448f0 
* Fixed Verilog netlist export with presence of unconnected plugs

* Made export port be output by default when direction undefined.

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Co-authored-by: Serge Rabyking <[email protected]>
rchotin pushed a commit that referenced this pull request Sep 4, 2024
@lanserge @rchotin
Fixed Verilog netlist export with presence of unconnected plugs (#96)
5fe90e4 
* Fixed Verilog netlist export with presence of unconnected plugs

* Made export port be output by default when direction undefined.

---------

Co-authored-by: Serge Rabyking <[email protected]>
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@Coloquinte Coloquinte Coloquinte approved these changes

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