[rom_ext, ownership] Fix the flash region configuration #5492
Triggered via pull request
February 3, 2025 22:54
cfrantz
Status
Success
Total duration
4h 54m 32s
Artifacts
33
ci.yml
on: pull_request
Lint (quick)
3m 3s
Earl Grey for CW310 Hyperdebug
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Build bitstream
2m 19s
Lint (slow)
11m 49s
Build documentation
4m 44s
Airgapped build
13m 59s
Verible lint
1m 7s
Run OTBN smoke Test
2m 28s
Run OTBN crypto tests
20m 6s
Verilated English Breakfast
8m 50s
Verilated Earl Grey
1h 24m
CW305's Bitstream
21m 33s
Build Docker Containers
2m 40s
Build and test software
16m 3s
CW310 Test ROM Tests
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FPGA test
6m 16s
CW310 ROM Tests
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FPGA test
32m 9s
CW310 ROM_EXT Tests
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FPGA test
5m 0s
CW310 SiVal Tests
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FPGA test
30m 8s
CW310 SiVal ROM_EXT Tests
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FPGA test
30m 7s
CW310 Manufacturing Tests
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FPGA test
27m 43s
Hyper310 ROM_EXT Tests
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FPGA test
14m 12s
CW340 Test ROM Tests
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FPGA test
1m 0s
CW340 ROM Tests
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FPGA test
55s
CW340 ROM_EXT Tests
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FPGA test
55s
CW340 SiVal Tests
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FPGA test
5m 31s
CW340 SiVal ROM_EXT Tests
/
FPGA test
58s
CW340 Manufacturing Tests
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FPGA test
38m 21s
Cache bitstreams to GCP
0s
Verify FPGA jobs
22s
Annotations
2 errors
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Lint (slow)
Process completed with exit code 1.
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Build and test software
Process completed with exit code 127.
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Artifacts
Produced during runtime
| Name | Size | |
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chip_englishbreakfast_cw305
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1.34 MB |
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execute_fpga_rom_ext_tests_hyper310-targets
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641 Bytes |
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execute_fpga_rom_ext_tests_hyper310-test-results
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54.8 KB |
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execute_manuf_fpga_tests_cw310-targets
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648 Bytes |
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execute_manuf_fpga_tests_cw310-test-results
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71.2 KB |
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execute_manuf_fpga_tests_cw340-targets
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579 Bytes |
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execute_manuf_fpga_tests_cw340-test-results
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51.4 KB |
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execute_rom_ext_fpga_tests_cw310-targets
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325 Bytes |
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execute_rom_ext_fpga_tests_cw310-test-results
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2.58 KB |
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execute_rom_ext_fpga_tests_cw340-targets
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162 Bytes |
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execute_rom_ext_fpga_tests_cw340-test-results
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201 Bytes |
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execute_rom_fpga_tests_cw310-targets
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1.81 KB |
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execute_rom_fpga_tests_cw310-test-results
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45.2 KB |
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execute_rom_fpga_tests_cw340-targets
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162 Bytes |
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execute_rom_fpga_tests_cw340-test-results
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201 Bytes |
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execute_sival_fpga_tests_cw310-targets
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956 Bytes |
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execute_sival_fpga_tests_cw310-test-results
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71.7 KB |
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execute_sival_fpga_tests_cw340-targets
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274 Bytes |
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execute_sival_fpga_tests_cw340-test-results
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3.02 KB |
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execute_sival_rom_ext_fpga_tests_cw310-targets
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2.44 KB |
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execute_sival_rom_ext_fpga_tests_cw310-test-results
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184 KB |
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execute_sival_rom_ext_fpga_tests_cw340-targets
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162 Bytes |
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execute_sival_rom_ext_fpga_tests_cw340-test-results
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201 Bytes |
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execute_test_rom_fpga_tests_cw310-targets
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372 Bytes |
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execute_test_rom_fpga_tests_cw310-test-results
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52.6 KB |
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execute_test_rom_fpga_tests_cw340-targets
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162 Bytes |
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execute_test_rom_fpga_tests_cw340-test-results
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201 Bytes |
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partial-build-bin-chip_earlgrey_cw310
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6.04 MB |
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partial-build-bin-chip_earlgrey_cw310_hyperdebug
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5.98 MB |
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partial-build-bin-chip_earlgrey_cw340
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9.99 MB |
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sw_build_test-test-results
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61.8 KB |
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verilated_englishbreakfast
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6.38 MB |
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verilator_earlgrey-test-results
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8.92 KB |
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