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[aon_timer,dv] Fix how we wait for intr_state to stop being busy #5545

[aon_timer,dv] Fix how we wait for intr_state to stop being busy

[aon_timer,dv] Fix how we wait for intr_state to stop being busy #5545

CW310 SiVal Tests  /  FPGA test

succeeded Feb 4, 2025 in 2m 45s