[dd, aon_timer] adding rtl exclusions to config file

Signed-off-by: Antonio Martinez Zambrana <[email protected]>
lowRISC · Jan 8, 2025 · 71c55ec · 71c55ec
1 parent 30153c0
commit 71c55ec
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Showing 2 changed files with 2 additions and 6 deletions.
diff --git a/hw/ip/aon_timer/dv/aon_timer_sim_cfg.hjson b/hw/ip/aon_timer/dv/aon_timer_sim_cfg.hjson
@@ -41,7 +41,8 @@
   reseed: 50
 
   // Add specific exclusion files.
-  vcs_cov_excl_files: ["{proj_root}/hw/ip/aon_timer/dv/cov/aon_timer_unr_excl.el"]
+  vcs_cov_excl_files: ["{proj_root}/hw/ip/aon_timer/dv/cov/aon_timer_unr_excl.el",
+                       "{proj_root}/hw/ip/aon_timer/dv/cov/aon_timer_unr_manually_excluded_excl.el"]
 
   // Default UVM test and seq class name.
   uvm_test: aon_timer_base_test

diff --git a/hw/ip/aon_timer/dv/cov/aon_timer_unr_manually_excluded_excl.el b/hw/ip/aon_timer/dv/cov/aon_timer_unr_manually_excluded_excl.el
@@ -47,11 +47,6 @@ CHECKSUM: "2815520955 4051034043"
 INSTANCE: tb.dut.u_reg.u_wkup_cause_cdc.u_arb
 ANNOTATION: "Default statement can't be hit unless some wrong value is forced in the `state_d` signal"
 Branch 4 "3547459906" "gen_wr_req.state_q" (6) "gen_wr_req.state_q default,-,-,-,-"
-CHECKSUM: "530940107 4102526809"
-INSTANCE: tb.dut
-ANNOTATION: "intr_test_flds_we[0/1] is asserted at the same time whenever the intr_test register is written, so the combination of only one Qe being set is not possible."
-Condition 4 "594611319" "(reg2hw.intr_test.wkup_timer_expired.qe | reg2hw.intr_test.wdog_timer_bark.qe) 1 -1" (3 "10")
-Condition 4 "594611319" "(reg2hw.intr_test.wkup_timer_expired.qe | reg2hw.intr_test.wdog_timer_bark.qe) 1 -1" (2 "01")
 CHECKSUM: "1125143680 279071062"
 INSTANCE: tb.dut.u_reg.u_wkup_count_hi_cdc
 ANNOTATION: "src_ack is only 1 cycle pulse, and is an acknowledgment to a request from a read/write.