[hw,gpio,rtl] Add support for RACL

Signed-off-by: Robert Schilling <[email protected]>
lowRISC · Jan 31, 2025 · bc1c4c7 · bc1c4c7
1 parent db5e1e7
commit bc1c4c7
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Showing 10 changed files with 432 additions and 69 deletions.
diff --git a/hw/ip/gpio/data/gpio.hjson b/hw/ip/gpio/data/gpio.hjson
@@ -37,7 +37,7 @@
   ]
   clocking: [{clock: "clk_i", reset: "rst_ni"}],
   bus_interfaces: [
-    { protocol: "tlul", direction: "device" }
+    { protocol: "tlul", direction: "device", racl_support: true }
   ],
   available_inout_list: [
     { name: "gpio",
@@ -124,6 +124,36 @@
                ''',
       default: "'0"
     },
+    { struct:  "racl_policy_vec",
+      type:    "uni",
+      name:    "racl_policies",
+      act:     "rcv",
+      package: "top_racl_pkg",
+      desc:    '''
+        Incoming RACL policy vector from a racl_ctrl instance.
+        The policy selection vector (parameter) selects the policy for each register.
+      '''
+    }
+    { struct:  "logic",
+      type:    "uni",
+      name:    "racl_error",
+      act:     "req",
+      width  : "1",
+      desc:    '''
+        RACL error indication signal.
+        If 1, the error log contains valid information.
+      '''
+    }
+    { struct:  "racl_error_log",
+      type:    "uni",
+      name:    "racl_error_log",
+      act:     "req",
+      width:   "1"
+      package: "top_racl_pkg",
+      desc:    '''
+        RACL error log information of this module.
+      '''
+    }
   ]
 
 

diff --git a/hw/ip/gpio/doc/interfaces.md b/hw/ip/gpio/doc/interfaces.md
@@ -15,11 +15,14 @@ Referring to the [Comportable guideline for peripheral device functionality](htt
 
 ## [Inter-Module Signals](https://opentitan.org/book/doc/contributing/hw/comportability/index.html#inter-signal-handling)
 
-| Port Name      | Package::Struct       | Type    | Act   |   Width | Description                                                                                   |
-|:---------------|:----------------------|:--------|:------|--------:|:----------------------------------------------------------------------------------------------|
-| strap_en       | logic                 | uni     | rcv   |       1 | This signal is pulsed high by the power manager after reset in order to sample the HW straps. |
-| sampled_straps | gpio_pkg::gpio_straps | uni     | req   |       1 | This vector contains the sampled strap values.                                                |
-| tl             | tlul_pkg::tl          | req_rsp | rsp   |       1 |                                                                                               |
+| Port Name      | Package::Struct               | Type    | Act   |   Width | Description                                                                                                                          |
+|:---------------|:------------------------------|:--------|:------|--------:|:-------------------------------------------------------------------------------------------------------------------------------------|
+| strap_en       | logic                         | uni     | rcv   |       1 | This signal is pulsed high by the power manager after reset in order to sample the HW straps.                                        |
+| sampled_straps | gpio_pkg::gpio_straps         | uni     | req   |       1 | This vector contains the sampled strap values.                                                                                       |
+| racl_policies  | top_racl_pkg::racl_policy_vec | uni     | rcv   |       1 | Incoming RACL policy vector from a racl_ctrl instance. The policy selection vector (parameter) selects the policy for each register. |
+| racl_error     | logic                         | uni     | req   |       1 | RACL error indication signal. If 1, the error log contains valid information.                                                        |
+| racl_error_log | top_racl_pkg::racl_error_log  | uni     | req   |       1 | RACL error log information of this module.                                                                                           |
+| tl             | tlul_pkg::tl                  | req_rsp | rsp   |       1 |                                                                                                                                      |
 
 ## Interrupts
 

diff --git a/hw/ip/gpio/rtl/gpio.sv b/hw/ip/gpio/rtl/gpio.sv
@@ -10,10 +10,13 @@ module gpio
   import gpio_pkg::*;
   import gpio_reg_pkg::*;
 #(
-  parameter logic [NumAlerts-1:0] AlertAsyncOn = {NumAlerts{1'b1}},
-  parameter bit GpioAsHwStrapsEn = 1,
+  parameter logic [NumAlerts-1:0] AlertAsyncOn          = {NumAlerts{1'b1}},
+  parameter bit                   GpioAsHwStrapsEn      = 1,
   // This parameter instantiates 2-stage synchronizers on all GPIO inputs.
-  parameter bit GpioAsyncOn = 1
+  parameter bit                   GpioAsyncOn          = 1,
+  parameter bit                   EnableRacl           = 1'b0,
+  parameter bit                   RaclErrorRsp         = 1'b1,
+  parameter int unsigned          RaclPolicySelVec[18] = '{18{0}}
 ) (
   input clk_i,
   input rst_ni,
@@ -33,6 +36,11 @@ module gpio
   input  prim_alert_pkg::alert_rx_t [NumAlerts-1:0] alert_rx_i,
   output prim_alert_pkg::alert_tx_t [NumAlerts-1:0] alert_tx_o,
 
+  // RACL interface
+  input  top_racl_pkg::racl_policy_vec_t  racl_policies_i,
+  output logic                            racl_error_o,
+  output top_racl_pkg::racl_error_log_t   racl_error_log_o,
+
   // GPIOs
   input        [31:0] cio_gpio_i,
   output logic [31:0] cio_gpio_o,
@@ -210,7 +218,11 @@ module gpio
   end
 
   // Register module
-  gpio_reg_top u_reg (
+  gpio_reg_top #(
+    .EnableRacl(EnableRacl),
+    .RaclErrorRsp(RaclErrorRsp),
+    .RaclPolicySelVec(RaclPolicySelVec)
+  ) u_reg (
     .clk_i,
     .rst_ni,
 
@@ -220,6 +232,10 @@ module gpio
     .reg2hw,
     .hw2reg,
 
+    .racl_policies_i,
+    .racl_error_o,
+    .racl_error_log_o,
+
     // SEC_CM: BUS.INTEGRITY
     .intg_err_o (alerts[0])
   );
@@ -229,6 +245,8 @@ module gpio
   `ASSERT_KNOWN(CioGpioEnOKnown, cio_gpio_en_o)
   `ASSERT_KNOWN(CioGpioOKnown, cio_gpio_o)
   `ASSERT_KNOWN(AlertsKnown_A, alert_tx_o)
+  `ASSERT_KNOWN(RaclErrorKnown_A, racl_error_o)
+  `ASSERT_KNOWN(RaclErrorLogKnown_A, racl_error_log_o)
 
   // Alert assertions for reg_we onehot check
   `ASSERT_PRIM_REG_WE_ONEHOT_ERROR_TRIGGER_ALERT(RegWeOnehotCheck_A, u_reg, alert_tx_o[0])