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Enhancements to balancing, LUT mapping, and rewriting (#616)
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* Fix to AIG balancing

* Adding substitute_node_no_restrash to data structures and fanout_view

* Fixes in rewrite, sequential network support in depth_view

* Increase support for sequential circuits in cut_enumeration

* Enhanced LUT mapping

* Adding new SOP and ESOP balancing algorithms

* Adding tests for balancing

* Fixing bad balancing in ESOPs

* Updating changelog
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aletempiac authored Aug 6, 2023
1 parent fac58aa commit 1d2f04f
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Showing 26 changed files with 2,209 additions and 255 deletions.
8 changes: 8 additions & 0 deletions docs/algorithms/balancing.rst
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Expand Up @@ -15,6 +15,10 @@ Parameters and Statistics
Algorithm
~~~~~~~~~

.. doxygenfunction:: mockturtle::sop_balancing

.. doxygenfunction:: mockturtle::esop_balancing

.. doxygenfunction:: mockturtle::balancing

Rebalancing engines
Expand All @@ -23,3 +27,7 @@ Rebalancing engines
**Header:** ``mockturtle/algorithms/balancing/sop_balancing.hpp``

.. doxygenstruct:: mockturtle::sop_rebalancing

**Header:** ``mockturtle/algorithms/balancing/esop_balancing.hpp``

.. doxygenstruct:: mockturtle::esop_rebalancing
13 changes: 11 additions & 2 deletions docs/algorithms/lut_mapping.rst
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Expand Up @@ -22,11 +22,19 @@ configured using many options.
The following example shows how to perform a LUT mapping to an And-inverter
graph using the default settings:

.. code-block:: c++

aig_network aig = ...;
klut_network klut = lut_map( aig );

Alternatively, the mapping information can be saved on the original network
as follows:

.. code-block:: c++

aig_network aig = ...;
mapping_view mapped_aig{aig};
lut_map( mapped_aig );
lut_map_inplace( mapped_aig );

Note that the AIG is wrapped into a `mapping_view` in order to equip the
network structure with the required mapping methods.
Expand All @@ -46,7 +54,7 @@ computes the functions for the cut of each mapped node:
ps.remove_dominated_cuts = false;
ps.recompute_cuts = false;
ps.cut_enumeration_ps.cut_size = 8;
lut_map<mapped_view<mig_network, true>, true>( mapped_mig, ps );
lut_map_inplace<mapped_view<mig_network, true>, true>( mapped_mig, ps );

**Parameters and statistics**

Expand All @@ -60,6 +68,7 @@ computes the functions for the cut of each mapped node:

.. doxygenfunction:: mockturtle::lut_map

.. doxygenfunction:: mockturtle::lut_map_inplace

LUT mapping 2
-------------
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4 changes: 4 additions & 0 deletions docs/changelog.rst
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Expand Up @@ -14,6 +14,8 @@ v0.4 (not yet released)
- Add access methods to check if a node is present in the network given its immediate fanin (e.g., `has_and` in `aig_network`) `#580 <https://github.com/lsils/mockturtle/pull/580>`_
- Crossed networks (`crossed_klut_network` and `buffered_crossed_klut_network`) `#589 <https://github.com/lsils/mockturtle/pull/589>`_
- Generic network implementation with additional node types (`generic_network`) `#594 <https://github.com/lsils/mockturtle/pull/594>`_
- Adding `substitute_node_no_restrash` to `aig_network`, `xag_network`, `mig_network`, `xmg_network`, and `fanout_view` to substitute nodes without structural hashing and simplifications `#616 <https://github.com/lsils/mockturtle/pull/616>`_
- Adding `replace_in_node_no_restrash` to `aig_network`, `xag_network`, `mig_network`, and `xmg_network` to replace a fanin without structural hashing and simplifications `#616 <https://github.com/lsils/mockturtle/pull/616>`_
* Algorithms:
- AIG balancing (`aig_balance`) `#580 <https://github.com/lsils/mockturtle/pull/580>`_
- Cost-generic resubstitution (`cost_generic_resub`) `#554 <https://github.com/lsils/mockturtle/pull/554>`_
Expand All @@ -29,6 +31,8 @@ v0.4 (not yet released)
- DAG-aware in-place rewriting (`rewrite`) `#605 <https://github.com/lsils/mockturtle/pull/605>`_
- Dynamic cut enumeration (`dynamic_cut_enumeration_impl`) `#605 <https://github.com/lsils/mockturtle/pull/605>`_
- Extensions and fixes in refactoring (`refactoring`) `#607 <https://github.com/lsils/mockturtle/pull/607>`_
- Improving LUT mapping, changing its interface, and integrating SOP/ESOP balancing (`lut_map`) `#616 <https://github.com/lsils/mockturtle/pull/616>`_
- Adding LUT-based SOP and ESOP balancing (`sop_balancing`, `esop_balancing`) `#616 <https://github.com/lsils/mockturtle/pull/616>`_
* I/O:
- Write gates to GENLIB file (`write_genlib`) `#606 <https://github.com/lsils/mockturtle/pull/606>`_
* Views:
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2 changes: 1 addition & 1 deletion docs/network.rst
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Expand Up @@ -125,7 +125,7 @@ Restructuring
~~~~~~~~~~~~~

.. doxygenclass:: mockturtle::network
:members: substitute_node, substitute_nodes, replace_in_node, replace_in_outputs, take_out_node, is_dead
:members: substitute_node, substitute_node_no_restrash, substitute_nodes, replace_in_node, replace_in_node_no_restrash, replace_in_outputs, take_out_node, is_dead
:no-link:

Structural properties
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76 changes: 76 additions & 0 deletions experiments/balancing.cpp
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@@ -0,0 +1,76 @@
/* mockturtle: C++ logic network library
* Copyright (C) 2018-2023 EPFL
*
* Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/

#include <string>
#include <vector>

#include <fmt/format.h>
#include <lorina/aiger.hpp>
#include <mockturtle/algorithms/balancing.hpp>
#include <mockturtle/algorithms/lut_mapper.hpp>
#include <mockturtle/io/aiger_reader.hpp>
#include <mockturtle/networks/xag.hpp>
#include <mockturtle/networks/klut.hpp>
#include <mockturtle/views/depth_view.hpp>

#include <experiments.hpp>

int main()
{
using namespace experiments;
using namespace mockturtle;

experiment<std::string, uint32_t, uint32_t, uint32_t, uint32_t, double, bool> exp( "sop_balancing", "benchmark", "size_before", "depth_before", "size_after", "depth_after", "runtime", "equivalent" );

for ( auto const& benchmark : epfl_benchmarks() )
{
fmt::print( "[i] processing {}\n", benchmark );
xag_network xag;
if ( lorina::read_aiger( benchmark_path( benchmark ), aiger_reader( xag ) ) != lorina::return_code::success )
{
continue;
}

const uint32_t size_before = xag.num_gates();
const uint32_t depth_before = depth_view{ xag }.depth();

lut_map_params ps;
ps.cut_enumeration_ps.cut_size = 4u;
lut_map_stats st;
const xag_network balanced_xag = esop_balancing( xag, ps, &st );

const uint32_t size_after = balanced_xag.num_gates();
const uint32_t depth_after = depth_view{ balanced_xag }.depth();

auto const cec = benchmark == "hyp" ? true : abc_cec( balanced_xag, benchmark );

exp( benchmark, size_before, depth_before, size_after, depth_after, to_seconds( st.time_total ), cec );
}

exp.save();
exp.table();

return 0;
}
5 changes: 1 addition & 4 deletions experiments/lut_mapper.cpp
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Expand Up @@ -28,7 +28,6 @@

#include <fmt/format.h>
#include <lorina/aiger.hpp>
#include <mockturtle/algorithms/collapse_mapped.hpp>
#include <mockturtle/algorithms/lut_mapper.hpp>
#include <mockturtle/io/aiger_reader.hpp>
#include <mockturtle/networks/aig.hpp>
Expand Down Expand Up @@ -61,9 +60,7 @@ int main()
ps.area_oriented_mapping = false;
ps.cut_expansion = true;
lut_map_stats st;
mapping_view<aig_network, false> mapped_aig{ aig };
lut_map<decltype( mapped_aig ), false>( mapped_aig, ps, &st );
const auto klut = *collapse_mapped_network<klut_network>( mapped_aig );
const auto klut = lut_map( aig, ps, &st );

depth_view<klut_network> klut_d{ klut };

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4 changes: 2 additions & 2 deletions include/mockturtle/algorithms/aig_balancing.hpp
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Expand Up @@ -65,7 +65,7 @@ class aig_balance_impl

public:
aig_balance_impl( Ntk& ntk, aig_balancing_params const& ps )
: ntk( ntk ), ps( ps ),storage( storage_init_size )
: ntk( ntk ), ps( ps ), storage( storage_init_size )
{
}

Expand Down Expand Up @@ -155,7 +155,7 @@ class aig_balance_impl
/* replace if new */
if ( n != ntk.get_node( root ) )
{
ntk.substitute_node( n, root );
ntk.substitute_node_no_restrash( n, root );
}

/* remember the substitution and the new node as already balanced */
Expand Down
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