[darjeeling] Always enable late debug feature

Signed-off-by: Robert Schilling <[email protected]>
matutem · Mar 4, 2025 · 334dea2 · 334dea2
1 parent 2e104e7
commit 334dea2
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Showing 4 changed files with 22 additions and 1 deletion.
diff --git a/hw/top_darjeeling/data/autogen/top_darjeeling.gen.hjson b/hw/top_darjeeling/data/autogen/top_darjeeling.gen.hjson
@@ -4653,6 +4653,7 @@
           width: 1
           default: prim_mubi_pkg::MuBi8False
           inst_name: rv_dm
+          top_signame: rv_dm_otp_dis_rv_dm_late_debug
           index: -1
         }
         {
@@ -11534,6 +11535,7 @@
       lc_ctrl.otp_manuf_state
       keymgr_dpe.otp_device_id
       sram_ctrl_main.otp_en_sram_ifetch
+      rv_dm.otp_dis_rv_dm_late_debug
     ]
     external:
     {
@@ -22602,6 +22604,7 @@
         width: 1
         default: prim_mubi_pkg::MuBi8False
         inst_name: rv_dm
+        top_signame: rv_dm_otp_dis_rv_dm_late_debug
         index: -1
       }
       {
@@ -31339,6 +31342,15 @@
         end_idx: -1
         default: prim_mubi_pkg::MuBi8False
       }
+      {
+        package: prim_mubi_pkg
+        struct: mubi8
+        signame: rv_dm_otp_dis_rv_dm_late_debug
+        width: 1
+        type: uni
+        end_idx: -1
+        default: prim_mubi_pkg::MuBi8False
+      }
     ]
   }
 }
diff --git a/hw/top_darjeeling/data/top_darjeeling.hjson b/hw/top_darjeeling/data/top_darjeeling.hjson
@@ -1346,6 +1346,8 @@
         'lc_ctrl.otp_manuf_state',
         'keymgr_dpe.otp_device_id',
         'sram_ctrl_main.otp_en_sram_ifetch',
+        # Unconditionally disable the late debug feature and enable early debug
+        'rv_dm.otp_dis_rv_dm_late_debug'
     ],
 
     // ext is to create port in the top.

diff --git a/hw/top_darjeeling/rtl/autogen/top_darjeeling.sv b/hw/top_darjeeling/rtl/autogen/top_darjeeling.sv
@@ -765,6 +765,7 @@ module top_darjeeling #(
   otp_ctrl_pkg::otp_manuf_state_t       lc_ctrl_otp_manuf_state;
   otp_ctrl_pkg::otp_device_id_t       keymgr_dpe_otp_device_id;
   prim_mubi_pkg::mubi8_t       sram_ctrl_main_otp_en_sram_ifetch;
+  prim_mubi_pkg::mubi8_t       rv_dm_otp_dis_rv_dm_late_debug;
 
   // define mixed connection to port
   assign edn0_edn_req[2] = ast_edn_req_i;
@@ -834,6 +835,9 @@ module top_darjeeling #(
   assign rv_core_ibex_irq_timer = intr_rv_timer_timer_expired_hart0_timer0;
   assign rv_core_ibex_hart_id = '0;
 
+  // Unconditionally disable the late debug feature and enable early debug
+  assign rv_dm_otp_dis_rv_dm_late_debug = prim_mubi_pkg::MuBi8True;
+
   assign rv_core_ibex_boot_addr = ADDR_SPACE_ROM_CTRL0__ROM;
 
   // Wire up alert handler LPGs
@@ -1723,7 +1727,7 @@ module top_darjeeling #(
       .lc_hw_debug_en_i(lc_ctrl_lc_hw_debug_en),
       .lc_dft_en_i(lc_ctrl_pkg::Off),
       .pinmux_hw_debug_en_i(lc_ctrl_pkg::Off),
-      .otp_dis_rv_dm_late_debug_i(prim_mubi_pkg::MuBi8False),
+      .otp_dis_rv_dm_late_debug_i(rv_dm_otp_dis_rv_dm_late_debug),
       .unavailable_i(1'b0),
       .ndmreset_req_o(rv_dm_ndmreset_req),
       .dmactive_o(),

diff --git a/hw/top_darjeeling/templates/toplevel.sv.tpl b/hw/top_darjeeling/templates/toplevel.sv.tpl
@@ -370,6 +370,9 @@ module top_${top["name"]} #(
   assign rv_core_ibex_irq_timer = intr_rv_timer_timer_expired_hart0_timer0;
   assign rv_core_ibex_hart_id = '0;
 
+  // Unconditionally disable the late debug feature and enable early debug
+  assign rv_dm_otp_dis_rv_dm_late_debug = prim_mubi_pkg::MuBi8True;
+
   ## Not all top levels have a rom controller.
   ## For those that do not, reference the ROM directly.
 <% num_rom_ctrl = lib.num_rom_ctrl(top["module"]) %>\