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fixed register settings (better performance); fixed packet numbering bug
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micas-pro committed Nov 15, 2015
1 parent 6da764c commit 92c8037
Showing 1 changed file with 30 additions and 25 deletions.
55 changes: 30 additions & 25 deletions raspberrypi/src/librapidradio/librapidradio.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -55,20 +55,20 @@ const uint8_t PROGMEM RFM7x_cmd_switch_cfg[] = { 0x50, 0x53 }; //
const uint8_t PROGMEM RFM7x_cmd_flush_rx[] = { 0xe2, 0x00 }; // flush RX FIFO
const uint8_t PROGMEM RFM7x_cmd_flush_tx[] = { 0xe1, 0x00 }; // flush TX FIFO
const uint8_t PROGMEM RFM7x_cmd_activate[] = { 0x50, 0x73 }; //
const uint8_t PROGMEM RFM7x_cmd_tog1[] = { (0x20 | 0x04), 0xd9 | 0x06, 0x9e, 0x86, 0x0b };
const uint8_t PROGMEM RFM7x_cmd_tog2[] = { (0x20 | 0x04), 0xd9 & ~0x06, 0x9e, 0x86, 0x0b};
const uint8_t PROGMEM RFM7x_cmd_tog1[] = { (0x20 | 0x04), 0xF9 | 0x06, 0x96, 0x82, 0xDB };
const uint8_t PROGMEM RFM7x_cmd_tog2[] = { (0x20 | 0x04), 0xF9, 0x96, 0x82, 0xDB};

//RFM73
//************ Bank0 register initialization commands
const uint8_t PROGMEM RFM7x_bank0Init[][2] = {
// address data
{ (0x20 | 0x00), 0x03 }, //Disable CRC ,CRC=1byte, POWER UP, RX
{ (0x20 | 0x00), 0x0F }, //Disable CRC ,CRC=1byte, POWER UP, RX
{ (0x20 | 0x01), 0x3F }, //Enable auto acknowledgement data pipe0-5
{ (0x20 | 0x02), 0x3F }, //Enable RX Addresses pipe0-5
{ (0x20 | 0x03), 0x02 }, //RX/TX address field width 4byte
{ (0x20 | 0x03), 0x03 }, //RX/TX address field width 4byte
{ (0x20 | 0x04), 0xFF }, //4ms, 15 retries
{ (0x20 | 0x05), 0x17 }, //channel = 0x17
{ (0x20 | 0x06), 0x0F }, //init register 6 for RFM73 (2M, LNA gain high, 5dBM) //2F
{ (0x20 | 0x06), 0x2F }, //init register 6 for RFM73 (2M, LNA gain high, 5dBM) //2F
{ (0x20 | 0x07), 0x07 }, //
{ (0x20 | 0x08), 0x00 }, //
{ (0x20 | 0x09), 0x00 }, //
Expand All @@ -82,27 +82,29 @@ const uint8_t PROGMEM RFM7x_bank0Init[][2] = {
{ (0x20 | 0x14), 0x20 }, //Payload len pipe0
{ (0x20 | 0x15), 0x20 }, //Payload len pipe0
{ (0x20 | 0x16), 0x20 }, //Payload len pipe0
{ (0x20 | 0x17), 0x20 }, //Payload len pipe0
{ (0x20 | 0x17), 0x00 }, //0x20
{ (0x20 | 0x1C), 0x3F }, //Enable dynamic payload legth data pipe0-5
{ (0x20 | 0x1D), 0x07 } //Enables Dynamic Payload Length,Enables Payload with ACK
};

//************ Bank1 register initialization commands
const uint8_t PROGMEM RFM7x_bank1Init[][5] = {
{ (0x20 | 0x00), 0x40, 0x4B, 0x01, 0xE2 },
{ (0x20 | 0x01), 0xC0, 0x4B, 0x00, 0x00 },
{ (0x20 | 0x02), 0xD0, 0xFC, 0x8C, 0x02 },
{ (0x20 | 0x03), 0x99, 0x00, 0x39, 0x41 },
{ (0x20 | 0x04), 0xDB, 0x82, 0x96, 0xF9 },
{ (0x20 | 0x05), 0xB6, 0x0F, 0x06, 0x24 },
{ (0x20 | 0x06), 0x00, 0x00, 0x00, 0x00 },
{ (0x20 | 0x07), 0x00, 0x00, 0x00, 0x00 },
{ (0x20 | 0x08), 0x00, 0x00, 0x00, 0x00 },
{ (0x20 | 0x09), 0x00, 0x00, 0x00, 0x00 },
{ (0x20 | 0x0a), 0x00, 0x00, 0x00, 0x00 },
{ (0x20 | 0x0b), 0x00, 0x00, 0x00, 0x00 },
{ (0x20 | 0x0C), 0x00, 0x12, 0x73, 0x00 },
{ (0x20 | 0x0D), 0x36, 0xb4, 0x80, 0x00 }
{ (0x20 | 0x00), 0x40, 0x4B, 0x01, 0xE2 },
{ (0x20 | 0x01), 0xC0, 0x4B, 0x00, 0x00 },
{ (0x20 | 0x02), 0xD0, 0xFC, 0x8C, 0x02 },
{ (0x20 | 0x03), 0x99, 0x00, 0x39, 0x41 },
//{ (0x20 | 0x04), 0xDB, 0x82, 0x96, 0xF9 }, //-- ?
{ (0x20 | 0x04), 0xF9, 0x96, 0x82, 0xDB },
//{ (0x20 | 0x05), 0xB6, 0x0F, 0x06, 0x24 }, //-- ?
{ (0x20 | 0x05), 0x24, 0x06, 0x0F, 0xB6 },
{ (0x20 | 0x06), 0x00, 0x00, 0x00, 0x00 },
{ (0x20 | 0x07), 0x00, 0x00, 0x00, 0x00 },
{ (0x20 | 0x08), 0x00, 0x00, 0x00, 0x00 },
{ (0x20 | 0x09), 0x00, 0x00, 0x00, 0x00 },
{ (0x20 | 0x0a), 0x00, 0x00, 0x00, 0x00 },
{ (0x20 | 0x0b), 0x00, 0x00, 0x00, 0x00 },
{ (0x20 | 0x0C), 0x00, 0x12, 0x73, 0x05 },
{ (0x20 | 0x0D), 0x36, 0xb4, 0x80, 0x00 }
};

//Bank1 register 14
Expand Down Expand Up @@ -205,9 +207,15 @@ bool initRegisters()
// do we have to toggle some bits here like in the example code?
writeRegPgmBuf((uint8_t *)RFM7x_cmd_tog1, sizeof(RFM7x_cmd_tog1));
writeRegPgmBuf((uint8_t *)RFM7x_cmd_tog2, sizeof(RFM7x_cmd_tog2));



_delay_ms(RFM7x_END_INIT_WAIT_MS);

selectBank(0);
setModeRX();

selectBank(1);

//Check the ChipID
if (readRegVal(0x08) != 0x63)
Expand All @@ -216,7 +224,6 @@ bool initRegisters()
}

selectBank(0);
setModeRX();

return true;
}
Expand Down Expand Up @@ -553,9 +560,6 @@ bool checkStatusForMissingIRQ(uint8_t &status)

TransmitResult internalSendPacket(const uint8_t *buff, const size_t &length, const uint32_t maxTimeoutUs, bool requestAck)
{
// Due to a bug in RFM7x to re-enable IRQ on sending successfully (RFM7x_IRQ_STATUS_TX_DS) there is a need to flush the TX FIFO
flushTxFIFO();

const size_t toSendLength = MIN(length, RFM7x_MAX_PACKET_LEN);
sendPayload(buff, toSendLength, requestAck ? 1 : 0);

Expand Down Expand Up @@ -653,7 +657,7 @@ TransmitResult internalSend(const uint8_t *buff, const size_t &length, bool requ
if (usePacketNumber)
{
uint8_t tmpBuff[RFM7x_MAX_PACKET_LEN];
tmpBuff[0] = packetNr++;
tmpBuff[0] = packetNr;
memcpy(tmpBuff + 1, buff + i, MIN(length - i, packetLength));
buffToSend = tmpBuff;
}
Expand All @@ -667,6 +671,7 @@ TransmitResult internalSend(const uint8_t *buff, const size_t &length, bool requ

if (result.status == Success)
{
packetNr++;
break;
}
else if (result.status == FifoFull)
Expand Down

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