DDMG

DDMG is an emulator for the Nintendo Game Boy (DMG) written in D. The goal of DDMG is to create a well-documented emulator with clear and concise code. These goals are not quite met yet.

Because of these goals, there are times where I will sacrifice performance for readability and understanding. I still make an effort to ensure that the compiler will optimize the code in a decent way.

Completed Features

• Boots and runs commercial games
• Video output
• CPU instructions are pretty accurate in results

Unfinished Features (vaguely in order of importance)

• Sound
• Ability to use bootrom dumps
• More accurate initial hwio values
• Improved MBC accuracy (requires hardware to test)
• Save states
• Battery saves
• Gameboy color support
• Multicart ROM support
• MBC2, MBC5, MBC6, MBC7, HuC3, HuC1, TAMA5
• Debugger
• Gameboy camera
• Gameboy printer

Tests

These are DDMG's results on different test ROMs. I'll add more in the future.

Blargg's Tests

Blargg has several test ROMs mostly revolving around cpu timings and sound along with the OAM and HALT bugs.

None of the Blargg sound tests are included in this README as sound is not implemented.

cpu_instrs

Test name	Status
01-special	✅
02-interrupts	✅
03-op sp,hl	✅
04-op r,imm	✅
05-op rp	✅
06-ld r,r	✅
07-jr,jp,call,ret,rst	✅
08-misc instrs	✅
09-op r,r	✅
10-bit ops	✅
11-op a,(hl)	✅

halt_bug ✅

instr_timing ✅

interrupt_time ❌

This fails because CGB double-speed mode is not implemented. It should work once CGB support is added.

mem_timing-2

Test name	Status
01-read_timing	✅
02-write_timing	✅
03-modify_timing	✅

oam_bug

Test name	Status
1-lcd_sync	❌
2-causes	❌
3-non_causes	✅
4-scanline_timing	❌
5-timing_bug	❌
6-timing_no_bug	✅
7-timing_effect	❌
8-instr_effect	❌

Gekkio's Tests

Gekkio has many acceptance tests he's written for his emulator mooneye-gb. These cover many different areas.

acceptance tests

Test name	Status
add sp e timing	✅
boot hwio dmgABCXmgb	❌
boot regs dmgABCX	✅
call timing	✅
call timing 2	✅
call cc timing	✅
call cc timing 2	✅
di timing GS	❌
div timing	✅
ei timing	✅
halt ime0 ei	✅
halt ime0 noinstr timing	✅
halt ime1 timing	✅
halt ime1 timing2 GS	❌
if ie registers	✅
intr timing	✅
jp cc timing	✅
jp timing	✅
ld hl sp e timing	✅
oam dma restart	✅
oam dma start	✅
oam dma timing	✅
pop timing	✅
push timing	✅
rapid di ei	✅
ret cc timing	✅
ret timing	✅
reti intr timing	✅
reti timing	✅
rst timing	✅