make ARCH for ARM64 (Added support for ARM CPUs (armv8, armv8-dotprod, armv7) to be detected by Fishtest worker and passed as "ARCH" parameter for Stockfish "make")

[maximmasiutin]

In the past, FishTest did only support Mac ARM64 processors. Otherwise, it could not detect proper ARCH for make to build Stockfish. Now it should properly detect most ARM64 processors, including arm7 and arm8. I have tested on ARM64 Ampere Altra CPU and it detects it properly, see for example, the task "nonsingular8e2/998"(https://tests.stockfishchess.org/tests/view/6410778065775d3b539d76f5?show_task=998):

os: Linux 5.19.0-1010; ram: 3401MiB; compiler: g++ 12.2.0; python: 3.11.2; worker: 197; arch: 64bit POPCNT NEON

The only requirement that is left for the Fishtest to run on ARM64 Ampere Altra CPU is to have cutechess-cli already installed and have a symlink created (or manually copied rather than creating a symlink), otherwise it would be unable to download proper binary of cutechess-cli.

I have also checked on the Graviton 3 CPU that has GCC -march=armv8.4-a+crypto+rcpc+sha3+sm4+sve+rng+ssbs+i8mm+bf16+nodotprod
(it has arm8.4a but 'nodotprod') - see https://tests.stockfishchess.org/tests/view/64171ce265775d3b539eca66?show_task=219

[maximmasiutin]

Ampere Altra Command

gcc -march=native -Q --help=target

Ampere Altra Output

The following options are target specific:
  -mabi=                                lp64
  -march=                               armv8.2-a+crypto+fp16+rcpc+dotprod
  -mbig-endian                          [disabled]
  -mbionic                              [disabled]
  -mbranch-protection=        
  -mcmodel=                             small
  -mcpu=                                generic
  -mfix-cortex-a53-835769               [enabled]
  -mfix-cortex-a53-843419               [enabled]
  -mgeneral-regs-only                   [disabled]
  -mglibc                               [enabled]
  -mharden-sls=               
  -mlittle-endian                       [enabled]
  -mlow-precision-div                   [disabled]
  -mlow-precision-recip-sqrt            [disabled]
  -mlow-precision-sqrt                  [disabled]
  -mmusl                                [disabled]
  -momit-leaf-frame-pointer             [enabled]
  -moutline-atomics                     [enabled]
  -moverride=<string>         
  -mpc-relative-literal-loads           [enabled]
  -msign-return-address=                none
  -mstack-protector-guard-offset= 
  -mstack-protector-guard-reg= 
  -mstack-protector-guard=              global
  -mstrict-align                        [disabled]
  -msve-vector-bits=<number>            scalable
  -mtls-dialect=                        desc
  -mtls-size=                           24
  -mtrack-speculation                   [disabled]
  -mtune=                               generic
  -muclibc                              [disabled]
  -mverbose-cost-dump                   [disabled]

  Known AArch64 ABIs (for use with the -mabi= option):
    ilp32 lp64

  Supported AArch64 return address signing scope (for use with -msign-return-address= option):
    all non-leaf none

  The code model option names for -mcmodel:
    large small tiny

  Valid arguments to -mstack-protector-guard=:
    global sysreg

  The possible SVE vector lengths:
    1024 128 2048 256 512 scalable

  The possible TLS dialects:
    desc trad

Graviton3 Command

gcc -march=native -Q --help=target

Graviton3 Output

The following options are target specific:
  -mabi=                                lp64
  -march=                               armv8.4-a+crypto+rcpc+sha3+sm4+sve+rng+ssbs+i8mm+bf16+nodotprod
  -mbig-endian                          [disabled]
  -mbionic                              [disabled]
  -mbranch-protection=        
  -mcmodel=                             small
  -mcpu=                                generic
  -mfix-cortex-a53-835769               [enabled]
  -mfix-cortex-a53-843419               [enabled]
  -mgeneral-regs-only                   [disabled]
  -mglibc                               [enabled]
  -mharden-sls=               
  -mlittle-endian                       [enabled]
  -mlow-precision-div                   [disabled]
  -mlow-precision-recip-sqrt            [disabled]
  -mlow-precision-sqrt                  [disabled]
  -mmusl                                [disabled]
  -momit-leaf-frame-pointer             [enabled]
  -moutline-atomics                     [enabled]
  -moverride=<string>         
  -mpc-relative-literal-loads           [enabled]
  -msign-return-address=                none
  -mstack-protector-guard-offset= 
  -mstack-protector-guard-reg= 
  -mstack-protector-guard=              global
  -mstrict-align                        [disabled]
  -msve-vector-bits=<number>            scalable
  -mtls-dialect=                        desc
  -mtls-size=                           24
  -mtrack-speculation                   [disabled]
  -mtune=                               generic
  -muclibc                              [disabled]
  -mverbose-cost-dump                   [disabled]

  Known AArch64 ABIs (for use with the -mabi= option):
    ilp32 lp64

  Supported AArch64 return address signing scope (for use with -msign-return-address= option):
    all non-leaf none

  The code model option names for -mcmodel:
    large small tiny

  Valid arguments to -mstack-protector-guard=:
    global sysreg

  The possible SVE vector lengths:
    1024 128 2048 256 512 scalable

  The possible TLS dialects:
    desc trad

[ppigazzini]

To pass the CI please update the sri.txt file running:

env/bin/python3 worker.py a a --only_config --no_validation

[srowen]

Confirming this works for me on Altra Ampere. cutechess-cli also compiles fine on this architecture and indeed linking the binary into worker/testing/ is sufficient.

[maximmasiutin]

@ppigazzini - how can I resolve the conflict in worker/sri.txt? Can you please resolve it yourself?

[ppigazzini]

@ppigazzini - how can I resolve the conflict in worker/sri.txt? Can you please resolve it yourself?

I rebased on master, solved the conflicts on sri.txt (they compare twice), formatted the code to pass the linting check, create an up to date sri.txt, force pushed on your repo branch.
On your local git (I suppose that you have the remote origin https://github.com/maximmasiutin/fishtest.git)

git fetch -p origin
git switch arm-ampere-altra
git reset --hard origin/arm-ampere-altra

[maximmasiutin]

Thank you very much!