This tag is aligned with HPDCache tag v4.0.0
It containes
- HPDcache with only write through policy
- Memory reponses with errors (read error, write error, amo read error, amo write error, LR/SC response error) are activated
- PLRU System verilog SVA model is activated
- Arbiter System Verilog SVA models are activated
- Reset on the fly and flush on the fly is performed
- Here is the code coverage report from a light nightly run
codeCovHpDcacheDut.csv