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    32 repositories

    • cahz-orca

      Public
      Mirror of the now discontinued ORCA RISC-V processor from VectorBlox.
      VHDL
      •
      Other
      •6•0•0•0•Updated Oct 26, 2024Oct 26, 2024

    • orca-public

      Public
      RISC-V by VectorBlox
      VHDL
      •
      Other
      •56•1•0•0•Updated Oct 26, 2024Oct 26, 2024

    • cva5pr

      Public
      Makefile
      •0•2•0•0•Updated Oct 24, 2024Oct 24, 2024

    • cx_runtime2.0

      Public
      Runnier, Timely-ier, Newer, Table-less, Not a Ninja Sloth
      C
      •0•0•0•0•Updated Oct 14, 2024Oct 14, 2024

    • mptorch

      Public
      ORCA copy of official mptorch repository
      Python
      •3•0•0•0•Updated Oct 10, 2024Oct 10, 2024

    • Multiported-RAM

      Public
      Modular Multi-ported SRAM-based Memory
      Verilog
      •
      Other
      •11•1•0•0•Updated Oct 10, 2024Oct 10, 2024

    • embench-iot

      Public
      The main Embench repository
      C
      •
      GNU General Public License v3.0
      •104•0•0•0•Updated Oct 4, 2024Oct 4, 2024

    • cx_runtime

      Public
      C
      •0•0•0•0•Updated Oct 1, 2024Oct 1, 2024

    • riscv-isa-manual

      Public
      RISC-V Instruction Set Manual
      TeX
      •
      Creative Commons Attribution 4.0 International
      •643•0•0•0•Updated Sep 13, 2024Sep 13, 2024

    • qemu_cx

      Public
      Official QEMU mirror, with modifications to support cx
      C
      •
      Other
      •5.6k•0•0•0•Updated Sep 12, 2024Sep 12, 2024

    • linux_cx

      Public
      Linux kernel source tree. Modified to work with cx
      C
      •
      Other
      •54k•0•0•0•Updated Sep 12, 2024Sep 12, 2024

    • flexbex

      Public
      C++
      •5•0•0•0•Updated Aug 28, 2024Aug 28, 2024

    • cva5

      Public
      SystemVerilog
      •
      Apache License 2.0
      •0•0•0•0•Updated Aug 12, 2024Aug 12, 2024

    • rvv-lite

      Public
      SystemVerilog
      •0•0•0•0•Updated Aug 11, 2024Aug 11, 2024

    • RISC-V_Summit_2024

      Public
      For uploading relevant documents for the 2024 North America RISC-V Summit.
      0•2•0•0•Updated Aug 5, 2024Aug 5, 2024

    • rvv-tests

      Public
      C
      •0•0•0•0•Updated Jul 19, 2024Jul 19, 2024

    • picolibc

      Public
      C
      •
      GNU General Public License v2.0
      •0•0•0•0•Updated Jul 4, 2024Jul 4, 2024

    • riscv-gnu-toolchain

      Public
      GNU toolchain for RISC-V, including GCC
      C
      •
      Other
      •1.2k•0•0•0•Updated Jul 4, 2024Jul 4, 2024

    • CX

      Public
      Proposed RISC-V Composable Custom Extensions Specification
      SystemVerilog
      •
      Apache License 2.0
      •12•0•0•0•Updated May 22, 2024May 22, 2024

    • verilog-axis

      Public
      Verilog AXI stream components for FPGA implementation
      Python
      •
      MIT License
      •228•0•0•0•Updated Apr 15, 2024Apr 15, 2024

    • verilog-axi

      Public
      Verilog AXI components for FPGA implementation
      Verilog
      •
      MIT License
      •447•0•0•0•Updated Jul 18, 2023Jul 18, 2023

    • axi

      Public
      AXI SystemVerilog synthesizable IP modules and verification infrastructure for high-performance on-chip communication
      SystemVerilog
      •
      Other
      •265•0•0•0•Updated Jul 6, 2023Jul 6, 2023

    • vicuna

      Public
      RISC-V Zve32x Vector Coprocessor
      Assembly
      •
      Other
      •45•0•0•0•Updated Dec 7, 2022Dec 7, 2022

    • vbx-orca

      Public
      Verilog
      •
      Other
      •4•1•0•0•Updated Jun 8, 2021Jun 8, 2021

    • vbx-mxp

      Public
      C
      •17•0•0•0•Updated Jun 8, 2021Jun 8, 2021

    • tiny-dnn

      Public
      header only, dependency-free deep learning framework in C++14
      C++
      •
      Other
      •1.4k•0•0•0•Updated Oct 1, 2020Oct 1, 2020

    • DEVBOX

      Public
      JavaScript
      •
      GNU General Public License v2.0
      •3•0•0•0•Updated Dec 21, 2018Dec 21, 2018

    • vbx-mxp-pynq

      Public
      Python+MXP Productivity for ZYNQ
      Jupyter Notebook
      •
      BSD 3-Clause "New" or "Revised" License
      •817•0•0•0•Updated Apr 18, 2017Apr 18, 2017

    • Indirectly-Indexed-2D-Ternary-Content-Addressable-Memory-TCAM

      Public
      Modular SRAM-based indirectly-indexed 2D hierarchical-search Ternary Content Addressable Memory (II-2D-TCAM)
      Verilog
      •
      Other
      •13•0•0•0•Updated Feb 6, 2016Feb 6, 2016

    • vbx-vectorblox.github.io

      Public
      CSS
      •0•0•0•0•Updated Aug 29, 2015Aug 29, 2015