Skip to content

Commit

Permalink
Merge pull request #646 from os-fpga/yosys-config-json
Browse files Browse the repository at this point in the history
Make sure no link using empty string net
  • Loading branch information
alaindargelas authored May 14, 2024
2 parents 6072d7b + e01dbed commit 9e3c0ef
Show file tree
Hide file tree
Showing 2 changed files with 7 additions and 1 deletion.
2 changes: 1 addition & 1 deletion CMakeLists.txt
Original file line number Diff line number Diff line change
Expand Up @@ -16,7 +16,7 @@ set(VERSION_MAJOR 0)
set(VERSION_MINOR 0)


set(VERSION_PATCH 316)
set(VERSION_PATCH 317)


project(yosys_verific_rs)
Expand Down
6 changes: 6 additions & 0 deletions design_edit/src/rs_design_edit.cc
Original file line number Diff line number Diff line change
Expand Up @@ -276,6 +276,9 @@ struct DesignEditRapidSilicon : public ScriptPass {
log_assert(signals.is_array());
}
for (auto& s : signals) {
if ((std::string)(s) == "") {
continue;
}
if (i == 0) {
linked += link_instance(instances_array, inst["linked_object"], (std::string)(s),
inst["direction"], uint32_t(inst["index"]) + 1, true,
Expand Down Expand Up @@ -318,6 +321,9 @@ struct DesignEditRapidSilicon : public ScriptPass {
if (!iter.value().is_string()) {
continue;
}
if ((std::string)(iter.key()) == "") {
continue;
}
if (std::find(CONNECTING_PORTS.begin(), CONNECTING_PORTS.end(), (std::string)(iter.key())) !=
CONNECTING_PORTS.end() ||
(inst["module"] == "PLL" && (std::string)(iter.key()) == "CLK_IN")) {
Expand Down

0 comments on commit 9e3c0ef

Please sign in to comment.