Add support for SAM4E (Baremetal example)

boards/sam4e8e_baremetal.json

@@ -0,0 +1,44 @@
+{
+  "build": {
+    "core": "baremetal",
+    "cpu": "cortex-m4",
+    "extra_flags": "-D__SAM4E8E__",
+    "f_cpu": "120000000L",
+    "hwids": [
+      [
+        "0x03EB",
+        "0x6124"
+      ]
+    ],
+    "mcu": "at91sam4e8e",
+    "usb_product": "Atmel SAM4",
+    "variant": "SAM4E8E_BM"
+  },
+  "debug": {
+    "jlink_device": "ATSAM4E8E",
+    "openocd_chipname": "atsam4E8E",
+    "openocd_target": "at91sam4XXX",
+    "svd_path": "ATSAM4E8E.svd"
+  },
+  "frameworks": [
+    "arduino",
+    "zephyr",
+    "arduinoCortexM4"
+  ],
+  "name": "Generic ATSAM4E",
+  "upload": {
+    "disable_flushing": true,
+    "maximum_ram_size": 98304,
+    "maximum_size": 524288,
+    "native_usb": true,
+    "protocol": "sam-ba",
+    "protocols": [
+      "sam-ba"
+    ],
+    "require_upload_port": true,
+    "use_1200bps_touch": true,
+    "wait_for_upload_port": true
+  },
+  "url": "https://www.microchip.com/wwwproducts/en/ATsam4e8e",
+  "vendor": "Microchip"
+}

examples/baremetal-blink/README.md

@@ -0,0 +1,27 @@
+How to build PlatformIO based project
+=====================================
+
+1. [Install PlatformIO Core](https://docs.platformio.org/page/core.html)
+2. Download [development platform with examples](https://github.com/platformio/platform-atmelsam/archive/develop.zip)
+3. Extract ZIP archive
+4. Run these commands:
+
+```shell
+# Change directory to example
+$ cd platform-atmelsam/examples/baremetal-blink
+
+# Build project
+$ pio run
+
+# Upload firmware
+$ pio run --target upload
+
+# Build specific environment
+$ pio run -e sam4e_baremetal
+
+# Upload firmware for the specific environment
+$ pio run -e sam4e_baremetal --target upload
+
+# Clean build files
+$ pio run --target clean
+```

examples/baremetal-blink/extra_script.py

@@ -0,0 +1,12 @@
+Import("env")
+
+#
+# Dump build environment (for debug)
+# print(env.Dump())
+#
+
+env.Append(
+  LINKFLAGS=[
+      "-Tsrc/variant/linker_scripts/gcc/flash.ld",
+  ]
+)

examples/baremetal-blink/platformio.ini

@@ -0,0 +1,19 @@
+; PlatformIO Project Configuration File
+;
+;   Build options: build flags, source filter, extra scripting
+;   Upload options: custom port, speed and extra flags
+;   Library options: dependencies, extra library storages
+;
+; Please visit documentation for the other options and examples
+; http://docs.platformio.org/page/projectconf.html
+
+
+[env:sam4e_baremetal]
+platform = https://github.com/chepo92/platform-atmelsam.git#ArduinoCustomPlatformFrameCore
+;framework = (baremetal)
+board = sam4e8e_baremetal
+platform_packages =
+    toolchain-gccarmnoneeabi @ 1.40804.0
+extra_scripts = extra_script.py    
+
+

examples/baremetal-blink/src/main.cpp

@@ -0,0 +1,66 @@
+/* ========================================================================== */
+/*                                                                            */
+/*   startup.c  main.c                                                        */
+/*   (c) 2017 Bob Cousins                                                     */
+/*                                                                            */
+/*   2023 Axel Sepulveda gh@chepo92                                           */
+/*   Description                                                              */
+/*                                                                            */
+/*   Minimal blink for SAM4E in platformio using no framework (baremetal)     */
+/* ========================================================================== */
+
+
+#include <stdint.h>
+#include "pio.h"
+#include "variant.h"
+
+
+void HardwareInit (void)
+{
+  // enable peripheral clock
+	//  PMC_WPMR  = PMC_WPKEY << 8 | 0;
+  PMC_PCER0 = 1 << ID_PIOE;  // PIO Clock on E
+
+  // PIOC
+	//  PIOC_WPMR  = PIO_WPKEY << 8 | 0;
+
+  PIOE->PIO_PER = 1 << LED_PIN;
+  PIOE->PIO_OER = 1 << LED_PIN;
+  PIOE->PIO_OWER = 1 << LED_PIN;
+}
+
+static uint32_t* const WDT_MR = (uint32_t*) 0x400E1854;     //  Watchdog Timer Mode Register SAM4: 0x400E1854  SAM3: 0x400E1A54
+
+
+int main()
+{
+  // watchdog timer is actived on boot with a default timeout so disable it
+  // note: you can only write to WDT_MR once after power on reset
+  // Atmel SAM3X8E Datasheet, section 15.4, page 261
+  // Atmel SAM4E8E Datasheet, section 16.5.2, page 362
+  *WDT_MR |= (1 << 15); // WDDIS (watchdog disable) bit, SAM3 page 265, SAM 4 page 362
+
+
+  HardwareInit ();
+
+/*
+ * Blink
+ * Turns on an LED on for one second,
+ * then off for one second, repeatedly.
+ */
+
+	for (;;)
+	{
+      PIOE->PIO_SODR = 1 << LED_PIN;
+      delay (50000);
+      PIOE->PIO_CODR = 1 << LED_PIN;
+      delay (50000);  
+	}
+
+	return 0 ; 
+
+}
+
+
+
+

examples/baremetal-blink/src/pio.h

@@ -0,0 +1,81 @@
+/* ========================================================================== */
+/*                                                                            */
+/*   startup.c  main.c                                                        */
+/*   (c) 2017 Bob Cousins                                                     */
+/*                                                                            */
+/*   2023 Axel Sepulveda gh@chepo92                                           */
+/*   Description                                                              */
+/*                                                                            */
+/*   Minimal blink for SAM4E in platformio using no framework (baremetal)     */
+/* ========================================================================== */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+// PIO definitions
+// Parallel Input/Output Controller (PIO) User Interface
+// You can see that consecutive 32 bit registers are mapped at 4 bytes increments. 
+// 0x0004 bytes = 4*8 = 32 bit
+
+// typedef  struct { } gpio  alternative as in \system\CMSIS\Device\ATMEL\sam4e\include\component\pio.h
+// extern struct gpio {
+struct gpio {
+  // + 0x00
+  volatile uint32_t PIO_PER;      // PIO Enable Register
+  volatile uint32_t PIO_PDR;      // PIO Disable Register
+  volatile uint32_t PIO_PSR;      // PIO Status Register 
+  volatile uint32_t res1;
+  // + 0x10
+  volatile uint32_t PIO_OER;
+  volatile uint32_t PIO_ODR;
+  volatile uint32_t PIO_OSR;
+  volatile uint32_t res2;
+  // + 0x20
+  volatile uint32_t PIO_IFER;
+  volatile uint32_t PIO_IFDR;
+  volatile uint32_t PIO_IFSR;
+  volatile uint32_t res3;
+  // + 0x30
+  volatile uint32_t PIO_SODR;
+  volatile uint32_t PIO_CODR;
+  volatile uint32_t PIO_ODSR;
+  volatile uint32_t PIO_PDSR;
+  // + 0x40
+  volatile uint32_t PIO_IER;
+  volatile uint32_t PIO_IDR;
+  volatile uint32_t PIO_IMR;
+  volatile uint32_t PIO_ISR;
+  // + 0x50
+  volatile uint32_t PIO_MDER;
+  volatile uint32_t PIO_MDDR;
+  volatile uint32_t PIO_MDSR;
+  volatile uint32_t res4;
+  // + 0x60
+  volatile uint32_t PIO_PUDR;
+  volatile uint32_t PIO_PUER;
+  volatile uint32_t PIO_PUSR;
+  volatile uint32_t res5;
+  // + 0x70
+  volatile uint32_t PIO_ABCDSR1;    // SAM4E Table 33-5. Register Mapping (Continued), SAM3: PIO_ABSR
+  volatile uint32_t PIO_ABCDSR2;    // SAM4E Table 33-5. Register Mapping (Continued), SAM3: reserved
+  volatile uint32_t res6[2];
+  // + 0x80
+  volatile uint32_t PIO_SCIFSR;
+  volatile uint32_t PIO_DIFSR;
+  volatile uint32_t PIO_IFDGSR;
+  volatile uint32_t PIO_SCDR;
+  // + 0x90
+  volatile uint32_t res7[4];
+  // + 0xA0
+  volatile uint32_t PIO_OWER;
+  volatile uint32_t PIO_OWDR;
+  volatile uint32_t PIO_OWSR;
+  volatile uint32_t res8;
+  // ...
+} ;
+
+
+#ifdef __cplusplus
+}
+#endif

examples/baremetal-blink/src/variant.cpp

@@ -0,0 +1,110 @@
+/* ========================================================================== */
+/*                                                                            */
+/*   startup.c  main.c                                                        */
+/*   (c) 2017 Bob Cousins                                                     */
+/*                                                                            */
+/*   2023 Axel Sepulveda gh@chepo92                                           */
+/*   Description                                                              */
+/*                                                                            */
+/*   Minimal blink for SAM4E in platformio using no framework (baremetal)     */
+/* ========================================================================== */
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+#define SCB_VTOR_ADDR 0xE000ED08    // Same for SAM3/4
+
+#define SCB_VTOR *(volatile uint32_t *)SCB_VTOR_ADDR
+
+// These must be defned in linker file
+extern unsigned long _etext;
+extern unsigned long _srelocate;
+extern unsigned long _erelocate;
+extern unsigned long _sbss;
+extern unsigned long _ebss;
+extern unsigned long _estack;
+
+extern int main(void);
+
+typedef void( *const intfunc )( void );
+
+void Reset_Handler(void) __attribute__((__interrupt__));
+void Default_Handler(void);
+
+#define NMI_Handler         Default_Handler
+#define HardFault_Handler   Default_Handler
+#define MemManage_Handler   Default_Handler
+#define BusFault_Handler    Default_Handler
+#define UsageFault_Handler  Default_Handler
+#define MemManage_Handler   Default_Handler
+#define SVC_Handler         Default_Handler
+#define DebugMon_Handler    Default_Handler
+#define PendSV_Handler      Default_Handler
+#define SysTick_Handler     Default_Handler
+
+
+__attribute__ ((section(".vectors")))
+void (* const g_pfnVectors[])(void) = {
+    (intfunc)((unsigned long)&_estack), /* The stack pointer after relocation */
+    Reset_Handler,              /* Reset Handler */
+    NMI_Handler,                /* NMI Handler */
+    HardFault_Handler,          /* Hard Fault Handler */
+    MemManage_Handler,          /* MPU Fault Handler */
+    BusFault_Handler,           /* Bus Fault Handler */
+    UsageFault_Handler,         /* Usage Fault Handler */
+    0,                          /* Reserved */
+    0,                          /* Reserved */
+    0,                          /* Reserved */
+    0,                          /* Reserved */
+    SVC_Handler,                /* SVCall Handler */
+    DebugMon_Handler,           /* Debug Monitor Handler */
+    0,                          /* Reserved */
+    PendSV_Handler,             /* PendSV Handler */
+    SysTick_Handler             /* SysTick Handler */
+};
+
+void Reset_Handler(void)
+{
+    /* Init Data:
+     * - Loads data from addresses defined in linker file into RAM
+     * - Zero bss (statically allocated uninitialized variables)
+     */
+    unsigned long *src, *dst;
+
+    /* copy the data segment into ram */
+    src = &_etext;
+    dst = &_srelocate;
+    if (src != dst)
+        while(dst < &_erelocate)
+            *(dst++) = *(src++);
+
+    /* zero the bss segment */
+    dst = &_sbss;
+    while(dst < &_ebss)
+        *(dst++) = 0;
+
+    SCB_VTOR = ((uint32_t)g_pfnVectors & (uint32_t)0x1FFFFF80);
+
+    main();
+    while(1) {}
+}
+
+void Default_Handler(void)
+{
+    while (1) {}
+}
+
+void delay (volatile uint32_t time)
+{
+  while (time--)
+    __asm ("nop");
+}
+
+
+#ifdef __cplusplus
+}
+#endif