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Merge pull request FEX-Emu#3884 from Sonicadvance1/remove_vex_telem
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Telemetry: Remove VEX flag
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Sonicadvance1 authored Jul 21, 2024
2 parents 228009c + 56df57e commit 5c9bb65
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Showing 26 changed files with 161 additions and 166 deletions.
2 changes: 0 additions & 2 deletions FEXCore/Source/Interface/Core/Frontend.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -632,7 +632,6 @@ bool Decoder::NormalOpHeader(const FEXCore::X86Tables::X86InstInfo* Info, uint16
uint16_t X87Op = ((Op - 0xD8) << 8) | ModRMByte;
return NormalOp(&X87Ops[X87Op], X87Op);
} else if (Info->Type == FEXCore::X86Tables::TYPE_VEX_TABLE_PREFIX) {
FEXCORE_TELEMETRY_SET(VEXOpTelem, 1);
uint16_t map_select = 1;
uint16_t pp = 0;
const uint8_t Byte1 = ReadByte();
Expand Down Expand Up @@ -678,7 +677,6 @@ bool Decoder::NormalOpHeader(const FEXCore::X86Tables::X86InstInfo* Info, uint16
FEXCore::X86Tables::X86InstInfo* LocalInfo = &VEXTableOps[Op];

if (LocalInfo->Type >= FEXCore::X86Tables::TYPE_VEX_GROUP_12 && LocalInfo->Type <= FEXCore::X86Tables::TYPE_VEX_GROUP_17) {
FEXCORE_TELEMETRY_SET(VEXOpTelem, 1);
// We have ModRM
uint8_t ModRMByte = ReadByte();
DecodeInst->ModRM = ModRMByte;
Expand Down
1 change: 0 additions & 1 deletion FEXCore/Source/Interface/Core/Frontend.h
Original file line number Diff line number Diff line change
Expand Up @@ -120,7 +120,6 @@ class Decoder final {

const uint8_t* AdjustAddrForSpecialRegion(const uint8_t* _InstStream, uint64_t EntryPoint, uint64_t RIP);

FEXCORE_TELEMETRY_INIT(VEXOpTelem, TYPE_USES_VEX_OPS);
FEXCORE_TELEMETRY_INIT(EVEXOpTelem, TYPE_USES_EVEX_OPS);
};
} // namespace FEXCore::Frontend
1 change: 0 additions & 1 deletion FEXCore/Source/Utils/Telemetry.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -20,7 +20,6 @@ std::array<Value, FEXCore::Telemetry::TelemetryType::TYPE_LAST> TelemetryValues
const std::array<std::string_view, FEXCore::Telemetry::TelemetryType::TYPE_LAST> TelemetryNames {
"64byte Split Locks",
"16byte Split atomics",
"VEX instructions (AVX)",
"EVEX instructions (AVX512)",
"16bit CAS Tear",
"32bit CAS Tear",
Expand Down
1 change: 0 additions & 1 deletion FEXCore/include/FEXCore/Utils/Telemetry.h
Original file line number Diff line number Diff line change
Expand Up @@ -12,7 +12,6 @@ namespace FEXCore::Telemetry {
enum TelemetryType {
TYPE_HAS_SPLIT_LOCKS,
TYPE_16BYTE_SPLIT,
TYPE_USES_VEX_OPS,
TYPE_USES_EVEX_OPS,
TYPE_CAS_16BIT_TEAR,
TYPE_CAS_32BIT_TEAR,
Expand Down
16 changes: 8 additions & 8 deletions unittests/InstructionCountCI/AVX128/VEX_map1.json
Original file line number Diff line number Diff line change
Expand Up @@ -516,7 +516,7 @@
],
"ExpectedArm64ASM": [
"ushr v2.4s, v16.4s, #31",
"ldr q3, [x28, #2464]",
"ldr q3, [x28, #2448]",
"ushl v2.4s, v2.4s, v3.4s",
"addv s2, v2.4s",
"mov w4, v2.s[0]"
Expand All @@ -530,7 +530,7 @@
"ExpectedArm64ASM": [
"ldr q2, [x28, #16]",
"ushr v3.4s, v16.4s, #31",
"ldr q4, [x28, #2464]",
"ldr q4, [x28, #2448]",
"ushl v3.4s, v3.4s, v4.4s",
"addv s3, v3.4s",
"mov w20, v3.s[0]",
Expand Down Expand Up @@ -4054,7 +4054,7 @@
"Map 1 0b01 0xd0 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2368]",
"ldr q2, [x28, #2352]",
"eor v2.16b, v18.16b, v2.16b",
"fadd v16.2d, v17.2d, v2.2d",
"movi v2.2d, #0x0",
Expand All @@ -4069,7 +4069,7 @@
"ExpectedArm64ASM": [
"ldr q2, [x28, #32]",
"ldr q3, [x28, #48]",
"ldr q4, [x28, #2368]",
"ldr q4, [x28, #2352]",
"eor v5.16b, v18.16b, v4.16b",
"fadd v16.2d, v17.2d, v5.2d",
"eor v3.16b, v3.16b, v4.16b",
Expand All @@ -4083,7 +4083,7 @@
"Map 1 0b11 0xd0 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2336]",
"ldr q2, [x28, #2320]",
"eor v2.16b, v18.16b, v2.16b",
"fadd v16.4s, v17.4s, v2.4s",
"movi v2.2d, #0x0",
Expand All @@ -4098,7 +4098,7 @@
"ExpectedArm64ASM": [
"ldr q2, [x28, #32]",
"ldr q3, [x28, #48]",
"ldr q4, [x28, #2336]",
"ldr q4, [x28, #2320]",
"eor v5.16b, v18.16b, v4.16b",
"fadd v16.4s, v17.4s, v5.4s",
"eor v3.16b, v3.16b, v4.16b",
Expand Down Expand Up @@ -4274,7 +4274,7 @@
"Map 1 0b01 0xd7 256-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2592]",
"ldr q2, [x28, #2576]",
"cmlt v3.16b, v16.16b, #0",
"and v2.16b, v3.16b, v2.16b",
"addp v2.16b, v2.16b, v2.16b",
Expand All @@ -4290,7 +4290,7 @@
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #16]",
"ldr q3, [x28, #2592]",
"ldr q3, [x28, #2576]",
"cmlt v4.16b, v16.16b, #0",
"and v4.16b, v4.16b, v3.16b",
"addp v4.16b, v4.16b, v4.16b",
Expand Down
50 changes: 25 additions & 25 deletions unittests/InstructionCountCI/AVX128/VEX_map2.json
Original file line number Diff line number Diff line change
Expand Up @@ -1964,7 +1964,7 @@
"Map 2 0b01 0x41 256-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2304]",
"ldr q2, [x28, #2288]",
"zip1 v3.8h, v2.8h, v17.8h",
"zip2 v2.8h, v2.8h, v17.8h",
"umin v2.4s, v3.4s, v2.4s",
Expand Down Expand Up @@ -4548,7 +4548,7 @@
"Map 2 0b01 0x96 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2336]",
"ldr q2, [x28, #2320]",
"eor v2.16b, v17.16b, v2.16b",
"mov v0.16b, v2.16b",
"fmla v0.4s, v16.4s, v18.4s",
Expand All @@ -4566,7 +4566,7 @@
"ldr q2, [x28, #16]",
"ldr q3, [x28, #32]",
"ldr q4, [x28, #48]",
"ldr q5, [x28, #2336]",
"ldr q5, [x28, #2320]",
"eor v6.16b, v17.16b, v5.16b",
"mov v0.16b, v6.16b",
"fmla v0.4s, v16.4s, v18.4s",
Expand All @@ -4582,7 +4582,7 @@
"Map 2 0b01 0x96 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2368]",
"ldr q2, [x28, #2352]",
"eor v2.16b, v17.16b, v2.16b",
"mov v0.16b, v2.16b",
"fmla v0.2d, v16.2d, v18.2d",
Expand All @@ -4600,7 +4600,7 @@
"ldr q2, [x28, #16]",
"ldr q3, [x28, #32]",
"ldr q4, [x28, #48]",
"ldr q5, [x28, #2368]",
"ldr q5, [x28, #2352]",
"eor v6.16b, v17.16b, v5.16b",
"mov v0.16b, v6.16b",
"fmla v0.2d, v16.2d, v18.2d",
Expand All @@ -4616,7 +4616,7 @@
"Map 2 0b01 0x97 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2400]",
"ldr q2, [x28, #2384]",
"eor v2.16b, v17.16b, v2.16b",
"mov v0.16b, v2.16b",
"fmla v0.4s, v16.4s, v18.4s",
Expand All @@ -4634,7 +4634,7 @@
"ldr q2, [x28, #16]",
"ldr q3, [x28, #32]",
"ldr q4, [x28, #48]",
"ldr q5, [x28, #2400]",
"ldr q5, [x28, #2384]",
"eor v6.16b, v17.16b, v5.16b",
"mov v0.16b, v6.16b",
"fmla v0.4s, v16.4s, v18.4s",
Expand All @@ -4650,7 +4650,7 @@
"Map 2 0b01 0x97 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2432]",
"ldr q2, [x28, #2416]",
"eor v2.16b, v17.16b, v2.16b",
"mov v0.16b, v2.16b",
"fmla v0.2d, v16.2d, v18.2d",
Expand All @@ -4668,7 +4668,7 @@
"ldr q2, [x28, #16]",
"ldr q3, [x28, #32]",
"ldr q4, [x28, #48]",
"ldr q5, [x28, #2432]",
"ldr q5, [x28, #2416]",
"eor v6.16b, v17.16b, v5.16b",
"mov v0.16b, v6.16b",
"fmla v0.2d, v16.2d, v18.2d",
Expand Down Expand Up @@ -5656,7 +5656,7 @@
"Map 2 0b01 0xa6 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2336]",
"ldr q2, [x28, #2320]",
"eor v2.16b, v18.16b, v2.16b",
"mov v0.16b, v2.16b",
"fmla v0.4s, v17.4s, v16.4s",
Expand All @@ -5674,7 +5674,7 @@
"ldr q2, [x28, #16]",
"ldr q3, [x28, #32]",
"ldr q4, [x28, #48]",
"ldr q5, [x28, #2336]",
"ldr q5, [x28, #2320]",
"eor v6.16b, v18.16b, v5.16b",
"mov v0.16b, v6.16b",
"fmla v0.4s, v17.4s, v16.4s",
Expand All @@ -5690,7 +5690,7 @@
"Map 2 0b01 0xa6 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2368]",
"ldr q2, [x28, #2352]",
"eor v2.16b, v18.16b, v2.16b",
"mov v0.16b, v2.16b",
"fmla v0.2d, v17.2d, v16.2d",
Expand All @@ -5708,7 +5708,7 @@
"ldr q2, [x28, #16]",
"ldr q3, [x28, #32]",
"ldr q4, [x28, #48]",
"ldr q5, [x28, #2368]",
"ldr q5, [x28, #2352]",
"eor v6.16b, v18.16b, v5.16b",
"mov v0.16b, v6.16b",
"fmla v0.2d, v17.2d, v16.2d",
Expand All @@ -5724,7 +5724,7 @@
"Map 2 0b01 0xa7 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2400]",
"ldr q2, [x28, #2384]",
"eor v2.16b, v18.16b, v2.16b",
"mov v0.16b, v2.16b",
"fmla v0.4s, v17.4s, v16.4s",
Expand All @@ -5742,7 +5742,7 @@
"ldr q2, [x28, #16]",
"ldr q3, [x28, #32]",
"ldr q4, [x28, #48]",
"ldr q5, [x28, #2400]",
"ldr q5, [x28, #2384]",
"eor v6.16b, v18.16b, v5.16b",
"mov v0.16b, v6.16b",
"fmla v0.4s, v17.4s, v16.4s",
Expand All @@ -5758,7 +5758,7 @@
"Map 2 0b01 0xa7 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2432]",
"ldr q2, [x28, #2416]",
"eor v2.16b, v18.16b, v2.16b",
"mov v0.16b, v2.16b",
"fmla v0.2d, v17.2d, v16.2d",
Expand All @@ -5776,7 +5776,7 @@
"ldr q2, [x28, #16]",
"ldr q3, [x28, #32]",
"ldr q4, [x28, #48]",
"ldr q5, [x28, #2432]",
"ldr q5, [x28, #2416]",
"eor v6.16b, v18.16b, v5.16b",
"mov v0.16b, v6.16b",
"fmla v0.2d, v17.2d, v16.2d",
Expand All @@ -5792,7 +5792,7 @@
"Map 2 0b01 0xb6 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2336]",
"ldr q2, [x28, #2320]",
"eor v2.16b, v16.16b, v2.16b",
"mov v16.16b, v2.16b",
"fmla v16.4s, v17.4s, v18.4s",
Expand All @@ -5809,7 +5809,7 @@
"ldr q2, [x28, #16]",
"ldr q3, [x28, #32]",
"ldr q4, [x28, #48]",
"ldr q5, [x28, #2336]",
"ldr q5, [x28, #2320]",
"eor v6.16b, v16.16b, v5.16b",
"mov v16.16b, v6.16b",
"fmla v16.4s, v17.4s, v18.4s",
Expand All @@ -5824,7 +5824,7 @@
"Map 2 0b01 0xb6 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2368]",
"ldr q2, [x28, #2352]",
"eor v2.16b, v16.16b, v2.16b",
"mov v16.16b, v2.16b",
"fmla v16.2d, v17.2d, v18.2d",
Expand All @@ -5841,7 +5841,7 @@
"ldr q2, [x28, #16]",
"ldr q3, [x28, #32]",
"ldr q4, [x28, #48]",
"ldr q5, [x28, #2368]",
"ldr q5, [x28, #2352]",
"eor v6.16b, v16.16b, v5.16b",
"mov v16.16b, v6.16b",
"fmla v16.2d, v17.2d, v18.2d",
Expand All @@ -5856,7 +5856,7 @@
"Map 2 0b01 0xb7 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2400]",
"ldr q2, [x28, #2384]",
"eor v2.16b, v16.16b, v2.16b",
"mov v16.16b, v2.16b",
"fmla v16.4s, v17.4s, v18.4s",
Expand All @@ -5873,7 +5873,7 @@
"ldr q2, [x28, #16]",
"ldr q3, [x28, #32]",
"ldr q4, [x28, #48]",
"ldr q5, [x28, #2400]",
"ldr q5, [x28, #2384]",
"eor v6.16b, v16.16b, v5.16b",
"mov v16.16b, v6.16b",
"fmla v16.4s, v17.4s, v18.4s",
Expand All @@ -5888,7 +5888,7 @@
"Map 2 0b01 0xb7 128-bit"
],
"ExpectedArm64ASM": [
"ldr q2, [x28, #2432]",
"ldr q2, [x28, #2416]",
"eor v2.16b, v16.16b, v2.16b",
"mov v16.16b, v2.16b",
"fmla v16.2d, v17.2d, v18.2d",
Expand All @@ -5905,7 +5905,7 @@
"ldr q2, [x28, #16]",
"ldr q3, [x28, #32]",
"ldr q4, [x28, #48]",
"ldr q5, [x28, #2432]",
"ldr q5, [x28, #2416]",
"eor v6.16b, v16.16b, v5.16b",
"mov v16.16b, v6.16b",
"fmla v16.2d, v17.2d, v18.2d",
Expand Down
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