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JIT: preserve nzcv for the slow atomic path
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Signed-off-by: Alyssa Rosenzweig <[email protected]>
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alyssarosenzweig committed Mar 30, 2024
1 parent deba6a1 commit 9fd32f0
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Showing 2 changed files with 10 additions and 1 deletion.
10 changes: 10 additions & 0 deletions FEXCore/Source/Interface/Core/JIT/Arm64/AtomicOps.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -31,6 +31,13 @@ DEF_OP(CASPair) {
mov(EmitSize, Dst.second, TMP4.R());
}
else {
// Save NZCV so we don't have to mark this op as clobbering NZCV (the
// SupportsAtomics does not clobber atomics and this !SupportsAtomics path
// is so slow it's not worth the complexity of splitting the IR op.). We
// clobber NZCV inside the hot loop and we can't replace cmp/ccmp/b.ne with
// something NZCV-preserving without requiring an extra instruction.
mrs(TMP1, ARMEmitter::SystemRegister::NZCV);

ARMEmitter::BackwardLabel LoopTop;
ARMEmitter::SingleUseForwardLabel LoopNotExpected;
ARMEmitter::SingleUseForwardLabel LoopExpected;
Expand All @@ -55,6 +62,9 @@ DEF_OP(CASPair) {
// Might have hit the case where ldaxr was hit but stlxr wasn't
clrex();
Bind(&LoopExpected);

// Restore
msr(ARMEmitter::SystemRegister::NZCV, TMP1);
}
}

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1 change: 0 additions & 1 deletion FEXCore/Source/Interface/IR/IR.json
Original file line number Diff line number Diff line change
Expand Up @@ -642,7 +642,6 @@
],
"HasDest": true,
"DestSize": "Size",
"ImplicitFlagClobber": true,
"NumElements": "2",
"EmitValidation": [
"Size == FEXCore::IR::OpSize::i64Bit || Size == FEXCore::IR::OpSize::i128Bit"
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