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Increase maximal Mchan DMA transfer sizes from 64KiB to 128KiB #47

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@Victor-Jung Victor-Jung commented Feb 27, 2025

This PR increases the maximal transfer sizes from 64KiB to 128KiB for the Mchan DMA (L1 <-> L2) of the Siracusa platform.

In previous versions of Mchan, the transfer length was encoded on 16 bits; since version 7, we can use 17 bits.

Added

  • Asserting the size of the transfer when generating the struct to configure DMA transfers to raise an error early if a transfer is invalid.
  • largeFloadAdd test in the CI. It performs a DMA transfer of size higher than 2^16.

Changed

  • The field of the data struct carrying the DMA transfer length is now a uint32 instead of uint16.

PR Merge Checklist

  1. The PR is rebased on the latest devel commit and pointing to devel.
  2. Your PR reviewed and approved.
  3. All checks are passing.
  4. The CHANGELOG.md file has been updated.
  5. If the docker was modified, change back its link after review.

@Victor-Jung Victor-Jung self-assigned this Feb 27, 2025
@Victor-Jung Victor-Jung requested a review from Xeratec as a code owner February 27, 2025 13:33
@Victor-Jung Victor-Jung marked this pull request as draft February 27, 2025 14:43
@Victor-Jung Victor-Jung changed the title DRAFT: Increase maximal Mchan DMA transfer sizes from 65KB to 131KB DRAFT: Increase maximal Mchan DMA transfer sizes from 64KiB to 128KiB Feb 27, 2025
@Victor-Jung Victor-Jung marked this pull request as ready for review February 28, 2025 08:47
@Victor-Jung Victor-Jung changed the title DRAFT: Increase maximal Mchan DMA transfer sizes from 64KiB to 128KiB Increase maximal Mchan DMA transfer sizes from 64KiB to 128KiB Feb 28, 2025
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