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v1.27.0

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@niwis niwis released this 01 Dec 13:24
· 68 commits to master since this release
02dc52b

1.27.0 - 2022-12-01

Added

  • Add mem_to_banks: split memory access over multiple parallel banks. Moved from the AXI4+ATOP
    axi_to_mem module.
  • Add read: dummy module that prevents a signal from being removed during synthesis

Changed

  • stream_fifo_optimal_wrap: Remove asserts
  • fall_through_register: Update fifo to fifo_v3

Fixed

  • FuseSoC: Add assertions.svh