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v1.29.0
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@niwis niwis released this 14 Apr 15:55
· 53 commits to master since this release
v1.29.0
4ac82b4
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niwis Nils Wistoff
GPG key ID: 9E1ECF6D111DEFC3
Learn about vigilant mode.

1.29.0 - 2023-04-14

Added

  • Add shift_reg_gated: Shift register with ICG for arbitrary types.

Changed

  • CI: Run testbenches in test/ on internal gitlab mirror.
  • fifo_tb: Add test for DEPTH not power of two.

Fixed

  • clk_int_div: Allow configuration while clock is disabled.
  • mem_to_banks: Cut possible timing loop for HideStrb feature.
  • Improved tool compatibility (Verilator, Questasim, Synopsys).
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