The xfOpenCV library is a set of 50+ kernels, optimized for Xilinx FPGAs and SoCs, based on the OpenCV computer vision library. The kernels in the xfOpenCV library are optimized and supported in the Xilinx SDx Tool Suite.
The library is organized into the following folders -
Folder Name | Contents |
---|---|
examples | Examples that evaluate the xfOpenCV kernels, and demonstrate the kernels' use model |
include | The relevant headers necessary to use the xfOpenCV kernels |
The organization of contents in each folder is described in the readmes of the respective folders. For more information on the xfOpenCV libraries and their use models, please refer to the Xilinx OpenCV User Guide.
To get a local copy of the SDAccel example repository, clone this repository to the local system with the following command:
git clone https://github.com/Xilinx/xfopencv xfopencv
Where 'xfopencv' is the name of the directory where the repository will be stored on the local system.This command needs to be executed only once to retrieve the latest version of the xfOpenCV library. The only required software is a local installation of git.
The xfOpenCV library is designed to work with Zynq and Zynq Ultrascale+ FPGAs. The library has been verified on zcu102 board. SDSoC 2017.1 Development Environment is required to work with the library. zcu102 reVISION platform is required to run the library on zcu102 board. Please download it from here: reVISION Platform
Full User Guide for xfOpenCV and usng OpenCV on Xilinx devices Check here: Xilinx OpenCV User Guide
For information on getting started with the reVISION stack check here: reVISION Getting Started Guide
For more information about SDSoC check here: SDSoC User Guides
For questions and to get help on this project or your own projects, visit the SDSoC Forums.
The source for this project is licensed under the 3-Clause BSD License
To contribute to this project, follow the guidelines in the Repository Contribution README
This library is written by developers at
Date | Readme Version | Release Notes |
---|---|---|
June2017 | 1.0 | Initial Xilinx release -Windows OS support is in Beta. |
September2017 | 2.0 | 2017.2 Xilinx release |
- Library within xf namespace – All functions in the library are now part of xf namespace.
- Dataflow enabled between functions – When multiple functions in the library are called in sequence, as part of a pipeline, dataflow is automatically inferred between the functions. Updated example for stereo pipeline provided.
- Updated latency profiling.
- Minor bug fixes
- Hardware kernels using 128-bit streaming interfaces will experience twice the expected latency. This will be resolved in a coming update.
- Windows OS has path length limitations, kernel names must be smaller than 25 characters.