Merge branch 'master' into vector-crypto-misaligned

riscv-software-src · Feb 1, 2025 · 64f5f8d · 64f5f8d
2 parents 3863328 + 18f4d0f
commit 64f5f8d
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Showing 8 changed files with 18 additions and 14 deletions.
diff --git a/riscv/insns/bclri.h b/riscv/insns/bclri.h
@@ -1,3 +1,4 @@
 require_extension(EXT_ZBS);
+require(SHAMT < xlen);
 int shamt = SHAMT & (xlen-1);
 WRITE_RD(sext_xlen(RS1 & ~(1LL << shamt)));
diff --git a/riscv/insns/bexti.h b/riscv/insns/bexti.h
@@ -1,3 +1,4 @@
 require_extension(EXT_ZBS);
+require(SHAMT < xlen);
 int shamt = SHAMT & (xlen-1);
 WRITE_RD(sext_xlen(1 & (RS1 >> shamt)));
diff --git a/riscv/insns/binvi.h b/riscv/insns/binvi.h
@@ -1,3 +1,4 @@
 require_extension(EXT_ZBS);
+require(SHAMT < xlen);
 int shamt = SHAMT & (xlen-1);
 WRITE_RD(sext_xlen(RS1 ^ (1LL << shamt)));
diff --git a/riscv/insns/bseti.h b/riscv/insns/bseti.h
@@ -1,3 +1,4 @@
 require_extension(EXT_ZBS);
+require(SHAMT < xlen);
 int shamt = SHAMT & (xlen-1);
 WRITE_RD(sext_xlen(RS1 | (1LL << shamt)));
diff --git a/riscv/insns/vcompress_vm.h b/riscv/insns/vcompress_vm.h
@@ -1,14 +1,14 @@
 // vcompress vd, vs2, vs1
+require(P.any_vector_extensions());
+require(P.VU.vstart->read() == 0);
+require_align(insn.rd(), P.VU.vflmul);
+require_align(insn.rs2(), P.VU.vflmul);
 require(insn.rd() != insn.rs2());
+require_noover(insn.rd(), P.VU.vflmul, insn.rs1(), 1);
 
 reg_t pos = 0;
 
 VI_GENERAL_LOOP_BASE
-  require(P.VU.vstart->read() == 0);
-  require_align(insn.rd(), P.VU.vflmul);
-  require_align(insn.rs2(), P.VU.vflmul);
-  require_noover(insn.rd(), P.VU.vflmul, insn.rs1(), 1);
-
   const int midx = i / 64;
   const int mpos = i % 64;
 

diff --git a/riscv/mmu.cc b/riscv/mmu.cc
@@ -241,8 +241,10 @@ void mmu_t::load_slow_path(reg_t original_addr, reg_t len, uint8_t* bytes, xlate
 
     reg_t len_page0 = std::min(len, PGSIZE - transformed_addr % PGSIZE);
     load_slow_path_intrapage(len_page0, bytes, access_info);
-    if (len_page0 != len)
-      load_slow_path_intrapage(len - len_page0, bytes + len_page0, access_info.split_misaligned_access(len_page0));
+    if (len_page0 != len) {
+      auto tail_access_info = generate_access_info(original_addr + len_page0, LOAD, xlate_flags);
+      load_slow_path_intrapage(len - len_page0, bytes + len_page0, tail_access_info);
+    }
   }
 
   while (len > sizeof(reg_t)) {
@@ -306,8 +308,10 @@ void mmu_t::store_slow_path(reg_t original_addr, reg_t len, const uint8_t* bytes
 
     reg_t len_page0 = std::min(len, PGSIZE - transformed_addr % PGSIZE);
     store_slow_path_intrapage(len_page0, bytes, access_info, actually_store);
-    if (len_page0 != len)
-      store_slow_path_intrapage(len - len_page0, bytes + len_page0, access_info.split_misaligned_access(len_page0), actually_store);
+    if (len_page0 != len) {
+      auto tail_access_info = generate_access_info(original_addr + len_page0, STORE, xlate_flags);
+      store_slow_path_intrapage(len - len_page0, bytes + len_page0, tail_access_info, actually_store);
+    }
   } else {
     store_slow_path_intrapage(len, bytes, access_info, actually_store);
   }

diff --git a/riscv/mmu.h b/riscv/mmu.h
@@ -57,10 +57,6 @@ struct mem_access_info_t {
   const bool effective_virt;
   const xlate_flags_t flags;
   const access_type type;
-
-  mem_access_info_t split_misaligned_access(reg_t offset) const {
-    return {vaddr + offset, transformed_vaddr + offset, effective_priv, effective_virt, flags, type};
-  }
 };
 
 void throw_access_exception(bool virt, reg_t addr, access_type type);

diff --git a/spike_main/spike.cc b/spike_main/spike.cc
@@ -78,7 +78,7 @@ static void help(int exit_code = 1)
       "required for a DMI access [default 0]\n");
   fprintf(stderr, "  --dm-abstract-rti=<n> Number of Run-Test/Idle cycles "
       "required for an abstract command to execute [default 0]\n");
-  fprintf(stderr, "  --dm-no-hasel         Debug module supports hasel\n");
+  fprintf(stderr, "  --dm-no-hasel         Debug module won't support hasel\n");
   fprintf(stderr, "  --dm-no-abstract-csr  Debug module won't support abstract CSR access\n");
   fprintf(stderr, "  --dm-no-abstract-fpr  Debug module won't support abstract FPR access\n");
   fprintf(stderr, "  --dm-no-halt-groups   Debug module won't support halt groups\n");