Added Zfh and Q Pseudo-instructions. Fixed D and F newlines. Remove a…

… printwrongly commited. Signed-off-by: Afonso Oliveira <[email protected]>
riscv · Aug 30, 2024 · a4b1c13 · a4b1c13
1 parent 69258f2
commit a4b1c13
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Showing 5 changed files with 14 additions and 3 deletions.
diff --git a/parse.py b/parse.py
@@ -116,9 +116,7 @@ def process_enc_line(line, ext):
             if len(parts := a.split('=')) == 2:
                 existing_arg, new_arg = parts
                 if existing_arg in arg_lut:
-                    print ("old",arg_lut)
                     arg_lut[a] = arg_lut[existing_arg]
-                    print ("new\n", arg_lut)
 
                 else:
                     logging.error(f' Found field {existing_arg} in variable {a} in instruction {name} whose mapping in arg_lut does not exist')

diff --git a/rv_d b/rv_d
@@ -29,4 +29,4 @@ fcvt.d.wu rd rs1 24..20=1 31..27=0x1A rm       26..25=1 6..2=0x14 1..0=3
 $pseudo_op rv_d::fsgnj.d  fmv.d  rd rs1 rs2=rs1 31..27=0x04 14..12=0 26..25=1 6..2=0x14 1..0=3
 $pseudo_op rv_d::fsgnjx.d fabs.d rd rs1 rs2=rs1 31..27=0x04 14..12=2 26..25=1 6..2=0x14 1..0=3
 $pseudo_op rv_d::fsgnjn.d fneg.d rd rs1 rs2=rs1 31..27=0x04 14..12=1 26..25=1 6..2=0x14 1..0=3
-
+
diff --git a/rv_f b/rv_f
@@ -43,3 +43,4 @@ $pseudo_op rv_zicsr::csrrw  fsrm       rd rs1      31..20=0x002 14..12=1 6..2=0x
 $pseudo_op rv_zicsr::csrrwi fsrmi      rd zimm     31..20=0x002 14..12=5 6..2=0x1C 1..0=3
 $pseudo_op rv_zicsr::csrrw  fscsr      rd rs1      31..20=0x003 14..12=1 6..2=0x1C 1..0=3
 $pseudo_op rv_zicsr::csrrs  frcsr      rd 19..15=0 31..20=0x003 14..12=2 6..2=0x1C 1..0=3
+
diff --git a/rv_q b/rv_q
@@ -26,3 +26,10 @@ fcvt.w.q  rd rs1 24..20=0 31..27=0x18 rm       26..25=3 6..2=0x14 1..0=3
 fcvt.wu.q rd rs1 24..20=1 31..27=0x18 rm       26..25=3 6..2=0x14 1..0=3
 fcvt.q.w  rd rs1 24..20=0 31..27=0x1A rm       26..25=3 6..2=0x14 1..0=3
 fcvt.q.wu rd rs1 24..20=1 31..27=0x1A rm       26..25=3 6..2=0x14 1..0=3
+
+
+#pseudoinstructions
+$pseudo_op rv_q::fsgnj.q  fmv.q  rd rs1 rs2=rs1 31..27=0x04 14..12=0 26..25=1 6..2=0x14 1..0=3
+$pseudo_op rv_q::fsgnjx.q fabs.q rd rs1 rs2=rs1 31..27=0x04 14..12=2 26..25=1 6..2=0x14 1..0=3
+$pseudo_op rv_q::fsgnjn.q fneg.q rd rs1 rs2=rs1 31..27=0x04 14..12=1 26..25=1 6..2=0x14 1..0=3
+
diff --git a/rv_zfh b/rv_zfh
@@ -28,3 +28,8 @@ fcvt.h.w  rd rs1 24..20=0 31..27=0x1A rm       26..25=2 6..2=0x14 1..0=3
 fcvt.h.wu rd rs1 24..20=1 31..27=0x1A rm       26..25=2 6..2=0x14 1..0=3
 fmv.h.x   rd rs1 24..20=0 31..27=0x1E 14..12=0 26..25=2 6..2=0x14 1..0=3
 
+#pseudoinstructions
+$pseudo_op rv_zfh::fsgnj.h  fmv.h  rd rs1 rs2=rs1 31..27=0x04 14..12=0 26..25=1 6..2=0x14 1..0=3
+$pseudo_op rv_zfh::fsgnjx.h fabs.h rd rs1 rs2=rs1 31..27=0x04 14..12=2 26..25=1 6..2=0x14 1..0=3
+$pseudo_op rv_zfh::fsgnjn.h fneg.h rd rs1 rs2=rs1 31..27=0x04 14..12=1 26..25=1 6..2=0x14 1..0=3
+