Merge pull request #25 from ved-rivos/ratified

update state to ratified

header.adoc

@@ -1,9 +1,9 @@
 [[header]]
 :description: Hardware Updating of PTE A/D Bits (Svadu)
 :company: RISC-V.org
-:revdate: 9/2023
-:revnumber: 1.0-rc2
-:revremark: This document is in Frozen state. See http://riscv.org/spec-state for details.
+:revdate: 11/2023
+:revnumber: 1.0
+:revremark: This document is in Ratified state. See http://riscv.org/spec-state for details.
 :url-riscv: http://riscv.org
 :doctype: book
 :preface-title: Preamble
@@ -38,12 +38,10 @@ endif::[]
 
 // Preamble
 [WARNING]
-.This document is in the link:http://riscv.org/spec-state[Frozen]
+.This document is in the link:http://riscv.org/spec-state[Ratified]
 ====
-Change is extremely unlikely. A high threshold will be used, and a change will
-only occur because of some truly critical issue being identified during the
-public review cycle. Any other desired or needed changes can be the subject of a
-follow-on new extension.
+No changes are allowed. Any desired or needed changes can be the subject of a
+follow-on new extension. Ratified extensions are never revised
 ====
 
 [preface]
@@ -53,7 +51,7 @@ Attribution 4.0 International License (CC-BY 4.0). The full
 license text is available at
 https://creativecommons.org/licenses/by/4.0/.
 
-Copyright 2022 by RISC-V International.
+Copyright 2023 by RISC-V International.
 
 [preface]
 === Contributors