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Small fixes for MIPS64 ISA targets.
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@wargio
wargio committed Feb 10, 2025
1 parent a11ec27 commit ab2a861
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Showing 3 changed files with 279 additions and 15 deletions.
52 changes: 50 additions & 2 deletions librz/arch/isa/mips/il/common.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -369,6 +369,17 @@ static RzILOpEffect *mips_il_lbu(const csh *handle, const cs_insn *insn, const u
return SETG(rt, byte);
}

static RzILOpEffect *mips_il_ld(const csh *handle, const cs_insn *insn, const ut32 gprlen) {
MIPS_CHECK_IF_TARGET_IS_ZERO_REG_AND_NOP();

const char *rt = REG(0);
RzILOpPure *offset = SN(gprlen, MEMOFFSET(1));
RzILOpPure *base = VARG_MEMBASE(1);

RzILOpPure *memaddr = ADD(base, offset);
return SETG(rt, LOADW(MIPS_DWORD_SIZE, memaddr));
}

static RzILOpEffect *mips_il_lh(const csh *handle, const cs_insn *insn, const ut32 gprlen) {
MIPS_CHECK_IF_TARGET_IS_ZERO_REG_AND_NOP();

Expand Down Expand Up @@ -411,7 +422,26 @@ static RzILOpEffect *mips_il_lw(const csh *handle, const cs_insn *insn, const ut
RzILOpPure *base = VARG_MEMBASE(1);

RzILOpPure *memaddr = ADD(base, offset);
return SETG(rt, LOADW(MIPS_WORD_SIZE, memaddr));
RzILOpPure *res = LOADW(MIPS_WORD_SIZE, memaddr);
if (gprlen > 32) {
res = SIGNED(gprlen, res);
}
return SETG(rt, res);
}

static RzILOpEffect *mips_il_lwu(const csh *handle, const cs_insn *insn, const ut32 gprlen) {
MIPS_CHECK_IF_TARGET_IS_ZERO_REG_AND_NOP();

const char *rt = REG(0);
RzILOpPure *offset = SN(gprlen, MEMOFFSET(1));
RzILOpPure *base = VARG_MEMBASE(1);

RzILOpPure *memaddr = ADD(base, offset);
RzILOpPure *res = LOADW(MIPS_WORD_SIZE, memaddr);
if (gprlen > 32) {
res = UNSIGNED(gprlen, res);
}
return SETG(rt, res);
}

static RzILOpEffect *mips_il_lwl(const csh *handle, const cs_insn *insn, const ut32 gprlen) {
Expand Down Expand Up @@ -724,6 +754,15 @@ static RzILOpEffect *mips_il_sb(const csh *handle, const cs_insn *insn, const ut
return STOREW(memaddr, trunc);
}

static RzILOpEffect *mips_il_sd(const csh *handle, const cs_insn *insn, const ut32 gprlen) {
RzILOpPure *rt = MIPS_REG(0);
RzILOpPure *offset = SN(gprlen, MEMOFFSET(1));
RzILOpPure *base = VARG_MEMBASE(1);

RzILOpPure *memaddr = ADD(base, offset);
return STOREW(memaddr, rt);
}

static RzILOpEffect *mips_il_seb(const csh *handle, const cs_insn *insn, const ut32 gprlen) {
// Sign-Extend Byte
RzILOpPure *rt = MIPS_REG(1);
Expand Down Expand Up @@ -871,7 +910,16 @@ static RzILOpEffect *mips_il_subu(const csh *handle, const cs_insn *insn, const
}

static RzILOpEffect *mips_il_sw(const csh *handle, const cs_insn *insn, const ut32 gprlen) {
RzILOpPure *rt = MIPS_REG(0);
RzILOpPure *rt = NULL;
if (REG_IS_ZERO(0)) {
rt = SN(MIPS_WORD_SIZE, 0);
} else {
rt = MIPS_REG(0);
if (gprlen > 32) {
rt = TRUNC32(rt);
}
}

RzILOpPure *offset = SN(gprlen, MEMOFFSET(1));
RzILOpPure *base = VARG_MEMBASE(1);

Expand Down
14 changes: 7 additions & 7 deletions librz/arch/isa/mips/mips_il.c
View file
Original file line number Diff line number Diff line change
Expand Up @@ -90,7 +90,7 @@ RZ_IPI RzILOpEffect *mips_il(RZ_NONNULL const csh *handle, RZ_NONNULL const cs_i
case MIPS_INS_JAL:
return mips_il_jal(handle, insn, gprlen);
case MIPS_INS_LD:
return NULL;
return mips_il_ld(handle, insn, gprlen);
case MIPS_INS_LWM:
return NULL;
case MIPS_INS_LA:
Expand Down Expand Up @@ -162,7 +162,7 @@ RZ_IPI RzILOpEffect *mips_il(RZ_NONNULL const csh *handle, RZ_NONNULL const cs_i
case MIPS_INS_S_D:
return NULL;
case MIPS_INS_SD:
return NULL;
return mips_il_sd(handle, insn, gprlen);
case MIPS_INS_DIV:
return mips_il_div(handle, insn, gprlen);
case MIPS_INS_SEQ:
Expand Down Expand Up @@ -988,13 +988,13 @@ RZ_IPI RzILOpEffect *mips_il(RZ_NONNULL const csh *handle, RZ_NONNULL const cs_i
case MIPS_INS_CMPI:
return NULL;
case MIPS_INS_DADD:
return NULL;
return mips_il_add(handle, insn, gprlen); // Long word add signed
case MIPS_INS_DADDI:
return NULL;
return mips_il_addi(handle, insn, gprlen); // Long word add immediate signed
case MIPS_INS_DADDIU:
return NULL;
return mips_il_addiu(handle, insn, gprlen); // Long word add immediate unsigned
case MIPS_INS_DADDU:
return NULL;
return mips_il_addu(handle, insn, gprlen); // Long word add unsigned
case MIPS_INS_DAHI:
return NULL;
case MIPS_INS_DALIGN:
Expand Down Expand Up @@ -1718,7 +1718,7 @@ RZ_IPI RzILOpEffect *mips_il(RZ_NONNULL const csh *handle, RZ_NONNULL const cs_i
case MIPS_INS_LWUPC:
return NULL;
case MIPS_INS_LWU:
return NULL;
return mips_il_lwu(handle, insn, gprlen);
case MIPS_INS_LWX:
return NULL;
case MIPS_INS_LWXC1:
Expand Down
228 changes: 222 additions & 6 deletions test/db/rzil/mips
View file
Original file line number Diff line number Diff line change
Expand Up @@ -10,7 +10,7 @@ o malloc://0x10 0x50000
oC 0x10 @ obj.seckrit
omb. obj.seckrit @ 0x0
e cfg.bigendian=true # o commands are bugged, changes the endianness.
e analysis.cpu=mips3+gpr32 # o commands are bugged, changes the arch and cpu
e asm.cpu=mips3+gpr32 # o commands are bugged, changes the arch and cpu
aezi
w AnyColourYouLike @ 0x50000
ar gp=loc._gp
Expand All @@ -37,7 +37,7 @@ o malloc://0x10 0x50000
oC 0x10 @ obj.seckrit
omb. obj.seckrit @ 0x0
e cfg.bigendian=true # o commands are bugged, changes the endianness.
e analysis.cpu=mips2 # o commands are bugged, changes the arch and cpu
e asm.cpu=mips2 # o commands are bugged, changes the arch and cpu
aezi
w AnyColourYouLike @ 0x50000
ar gp=loc._gp
Expand All @@ -64,7 +64,7 @@ o malloc://0x10 0x50000
oC 0x10 @ obj.seckrit
omb. obj.seckrit @ 0x0
e cfg.bigendian=true # o commands are bugged, changes the endianness.
e analysis.cpu=mips32 # o commands are bugged, changes the arch and cpu
e asm.cpu=mips32 # o commands are bugged, changes the arch and cpu
aezi
w AnyColourYouLike @ 0x50000
ar gp=loc._gp
Expand All @@ -91,7 +91,7 @@ o malloc://0x10 0x50000
oC 0x10 @ obj.seckrit
omb. obj.seckrit @ 0x0
e cfg.bigendian=true # o commands are bugged, changes the endianness.
e analysis.cpu=mips32r2 # o commands are bugged, changes the arch and cpu
e asm.cpu=mips32r2 # o commands are bugged, changes the arch and cpu
aezi
w AnyColourYouLike @ 0x50000
ar gp=loc._gp
Expand All @@ -118,7 +118,7 @@ o malloc://0x10 0x50000
oC 0x10 @ obj.seckrit
omb. obj.seckrit @ 0x0
e cfg.bigendian=true # o commands are bugged, changes the endianness.
e analysis.cpu=mips32r3 # o commands are bugged, changes the arch and cpu
e asm.cpu=mips32r3 # o commands are bugged, changes the arch and cpu
aezi
w AnyColourYouLike @ 0x50000
ar gp=loc._gp
Expand All @@ -145,7 +145,223 @@ o malloc://0x10 0x50000
oC 0x10 @ obj.seckrit
omb. obj.seckrit @ 0x0
e cfg.bigendian=true # o commands are bugged, changes the endianness.
e analysis.cpu=mips32r5 # o commands are bugged, changes the arch and cpu
e asm.cpu=mips32r5 # o commands are bugged, changes the arch and cpu
aezi
w AnyColourYouLike @ 0x50000
ar gp=loc._gp
ar sp=0x40ff0
ar a0=0x50000
aezsu `pdr~jr[0]`
ps @ obj.seckrit
EOF
EXPECT=<<EOF
Hello from RzIL!
EOF
EXPECT_ERR=
RUN

NAME=emulateme nostdlib mips3
FILE=bins/elf/emulateme.nostd.mips3
TIMEOUT=30
CMDS=<<EOF
e str.search.encoding=utf8
s sym.decrypt
af # required for pdr
o malloc://0x1000 0x40000
o malloc://0x10 0x50000
oC 0x10 @ obj.seckrit
omb. obj.seckrit @ 0x0
e cfg.bigendian=true # o commands are bugged, changes the endianness.
e asm.cpu=mips3 # o commands are bugged, changes the arch and cpu
aezi
w AnyColourYouLike @ 0x50000
ar gp=loc._gp
ar sp=0x40ff0
ar a0=0x50000
aezsu `pdr~jr[0]`
ps @ obj.seckrit
EOF
EXPECT=<<EOF
Hello from RzIL!
EOF
EXPECT_ERR=
RUN

NAME=emulateme nostdlib mips4
FILE=bins/elf/emulateme.nostd.mips4
TIMEOUT=30
CMDS=<<EOF
e str.search.encoding=utf8
s sym.decrypt
af # required for pdr
o malloc://0x1000 0x40000
o malloc://0x10 0x50000
oC 0x10 @ obj.seckrit
omb. obj.seckrit @ 0x0
e cfg.bigendian=true # o commands are bugged, changes the endianness.
e asm.cpu=mips4 # o commands are bugged, changes the arch and cpu
aezi
w AnyColourYouLike @ 0x50000
ar gp=loc._gp
ar sp=0x40ff0
ar a0=0x50000
aezsu `pdr~jr[0]`
ps @ obj.seckrit
EOF
EXPECT=<<EOF
Hello from RzIL!
EOF
EXPECT_ERR=
RUN

NAME=emulateme nostdlib mips64
FILE=bins/elf/emulateme.nostd.mips64
TIMEOUT=30
CMDS=<<EOF
e str.search.encoding=utf8
s sym.decrypt
af # required for pdr
o malloc://0x1000 0x40000
o malloc://0x10 0x50000
oC 0x10 @ obj.seckrit
omb. obj.seckrit @ 0x0
e cfg.bigendian=true # o commands are bugged, changes the endianness.
e asm.cpu=mips64 # o commands are bugged, changes the arch and cpu
aezi
w AnyColourYouLike @ 0x50000
ar gp=loc._gp
ar sp=0x40ff0
ar a0=0x50000
aezsu `pdr~jr[0]`
ps @ obj.seckrit
EOF
EXPECT=<<EOF
Hello from RzIL!
EOF
EXPECT_ERR=
RUN

NAME=emulateme nostdlib mips64
FILE=bins/elf/emulateme.nostd.mips64
TIMEOUT=30
CMDS=<<EOF
e str.search.encoding=utf8
s sym.decrypt
af # required for pdr
o malloc://0x1000 0x40000
o malloc://0x10 0x50000
oC 0x10 @ obj.seckrit
omb. obj.seckrit @ 0x0
e cfg.bigendian=true # o commands are bugged, changes the endianness.
e asm.cpu=mips64 # o commands are bugged, changes the arch and cpu
aezi
w AnyColourYouLike @ 0x50000
ar gp=loc._gp
ar sp=0x40ff0
ar a0=0x50000
aezsu `pdr~jr[0]`
ps @ obj.seckrit
EOF
EXPECT=<<EOF
Hello from RzIL!
EOF
EXPECT_ERR=
RUN

NAME=emulateme nostdlib mips64r2
FILE=bins/elf/emulateme.nostd.mips64r2
TIMEOUT=30
CMDS=<<EOF
e str.search.encoding=utf8
s sym.decrypt
af # required for pdr
o malloc://0x1000 0x40000
o malloc://0x10 0x50000
oC 0x10 @ obj.seckrit
omb. obj.seckrit @ 0x0
e cfg.bigendian=true # o commands are bugged, changes the endianness.
e asm.cpu=mips64r3 # o commands are bugged, changes the arch and cpu
aezi
w AnyColourYouLike @ 0x50000
ar gp=loc._gp
ar sp=0x40ff0
ar a0=0x50000
aezsu `pdr~jr[0]`
ps @ obj.seckrit
EOF
EXPECT=<<EOF
Hello from RzIL!
EOF
EXPECT_ERR=
RUN

NAME=emulateme nostdlib mips64r3
FILE=bins/elf/emulateme.nostd.mips64r3
TIMEOUT=30
CMDS=<<EOF
e str.search.encoding=utf8
s sym.decrypt
af # required for pdr
o malloc://0x1000 0x40000
o malloc://0x10 0x50000
oC 0x10 @ obj.seckrit
omb. obj.seckrit @ 0x0
e cfg.bigendian=true # o commands are bugged, changes the endianness.
e asm.cpu=mips64r3 # o commands are bugged, changes the arch and cpu
aezi
w AnyColourYouLike @ 0x50000
ar gp=loc._gp
ar sp=0x40ff0
ar a0=0x50000
aezsu `pdr~jr[0]`
ps @ obj.seckrit
EOF
EXPECT=<<EOF
Hello from RzIL!
EOF
EXPECT_ERR=
RUN

NAME=emulateme nostdlib orion
FILE=bins/elf/emulateme.nostd.orion
TIMEOUT=30
CMDS=<<EOF
e str.search.encoding=utf8
s sym.decrypt
af # required for pdr
o malloc://0x1000 0x40000
o malloc://0x10 0x50000
oC 0x10 @ obj.seckrit
omb. obj.seckrit @ 0x0
e cfg.bigendian=true # o commands are bugged, changes the endianness.
e asm.cpu=mips3# o commands are bugged, changes the arch and cpu
aezi
w AnyColourYouLike @ 0x50000
ar gp=loc._gp
ar sp=0x40ff0
ar a0=0x50000
aezsu `pdr~jr[0]`
ps @ obj.seckrit
EOF
EXPECT=<<EOF
Hello from RzIL!
EOF
EXPECT_ERR=
RUN

NAME=emulateme nostdlib p5600
FILE=bins/elf/emulateme.nostd.p5600
TIMEOUT=30
CMDS=<<EOF
e str.search.encoding=utf8
s sym.decrypt
af # required for pdr
o malloc://0x1000 0x40000
o malloc://0x10 0x50000
oC 0x10 @ obj.seckrit
omb. obj.seckrit @ 0x0
e cfg.bigendian=true # o commands are bugged, changes the endianness.
e asm.cpu=mips32r2# o commands are bugged, changes the arch and cpu
aezi
w AnyColourYouLike @ 0x50000
ar gp=loc._gp
Expand Down

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