VecCore 0.8.0
VecCore 0.8.0 adds a new backend based on GCC 11's implementation of std::experimental::simd
, which is part of the experimental support for data parallel types in C++20. More details about it can be found on the release notes, and documentation is available at https://en.cppreference.com/w/cpp/experimental/simd/simd.
This backend offers the best of both Vc and UME::SIMD, as it performs well in most cases, from SSE2 up to AVX512. It is also recommended and performs better than both Vc and UME::SIMD on ARM/ARM64. However, it does require a recent version of GCC or Clang and requires compiling code in C++20 mode. The recommended way to use this backend is via the SIMDNative
VecCore backend, which will map all vector types to their native SIMD types depending on what flags are enabled at compile time. A templated SIMDArray<N>
backend is provided in order to offer fixed size support, but is not yet recommended as performance is not as good as with SIMDNative
.
The version of Vc included with VecCore has been updated to the latest release, 1.4.2.
The online documentation has also been improved.
Support for compiling tests with Intel's DPC++ compiler has been added, and the continuous integration infrastructure has been expanded. GitHub Actions, and GitLab CI configurations now test various architectures.