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A _true_ fix for Vega Frontier GFXCLK record (#31)
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It turned out that the previous fix was incomplete.

The ATOM_Vega10_GFXCLK_Dependency_Table record structure depends on
table revision, and structure for table revision 0 and >0 are
completely different.
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sibradzic committed Jul 3, 2022
1 parent a69b380 commit 80337d3
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Showing 4 changed files with 59 additions and 128 deletions.
2 changes: 1 addition & 1 deletion setup.py
Original file line number Diff line number Diff line change
Expand Up @@ -5,7 +5,7 @@

setuptools.setup(
name='upp',
version='0.1.5',
version='0.1.6',
author='Samir Ibradžić',
description='Uplift Power Play',
long_description=long_description,
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9 changes: 6 additions & 3 deletions src/upp/decode.py
Original file line number Diff line number Diff line change
Expand Up @@ -355,14 +355,17 @@ def resolve_cstruct(name, family=family):
elif name == 'SclkDependencyTable': # ATOM_Polaris_SCLK_Dependency_Table
cs = getattr(pp_module, resolve_cstruct(name, 'Polaris'))
elif name == 'GfxclkDependencyTable':
# This by default points to ATOM_Vega10_GFXCLK_Dependency_Record, but
# we need to override it to ATOM_Vega10_GFXCLK_Dependency_Record_V2
# This by default points to ATOM_Vega10_GFXCLK_Dependency_Record but it
# needs override to ATOM_Vega10_GFXCLK_Dependency_Record_V2 for rev > 0
if revid in [0, 1]: # ATOM_Vega10_GFXCLK_Dependency_Table
cs = getattr(pp_module, resolve_cstruct(name))
entries_class = cs._fields_[-1][-1]
entry_name, entry_type = cs._fields_[-1]
assert entry_type._length_ == 0
record_struct = 'ATOM_Vega10_GFXCLK_Dependency_Record_V2'
if revid == 0:
record_struct = 'ATOM_Vega10_GFXCLK_Dependency_Record'
else:
record_struct = 'ATOM_Vega10_GFXCLK_Dependency_Record_V2'
entry_type = getattr(pp_module, record_struct)

class FixedEntriesTypeArray(ctypes.LittleEndianStructure):
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88 changes: 24 additions & 64 deletions test/AMD.RXVegaFrontier.16384.170628.rom.dump
Original file line number Diff line number Diff line change
Expand Up @@ -132,81 +132,41 @@ GfxclkDependencyTable:
VddInd: 0
CKSVOffsetandDisable: 32768
AVFSOffset: 0
ACGEnable: 28
Reserved:
Reserved 0: 131
Reserved 1: 1
Reserved 2: 0
entries 1:
Clk: 1
VddInd: 0
CKSVOffsetandDisable: 48264
AVFSOffset: 1
ACGEnable: 2
Reserved:
Reserved 0: 0
Reserved 1: 0
Reserved 2: 0
Clk: 99100
VddInd: 1
CKSVOffsetandDisable: 0
AVFSOffset: 0
entries 2:
Clk: 32486400
VddInd: 0
CKSVOffsetandDisable: 3
Clk: 113800
VddInd: 2
CKSVOffsetandDisable: 0
AVFSOffset: 0
ACGEnable: 0
Reserved:
Reserved 0: 144
Reserved 1: 14
Reserved 2: 2
entries 3:
Clk: 1024
VddInd: 0
CKSVOffsetandDisable: 32768
AVFSOffset: 562
ACGEnable: 0
Reserved:
Reserved 0: 5
Reserved 1: 0
Reserved 2: 0
Clk: 126900
VddInd: 3
CKSVOffsetandDisable: 0
AVFSOffset: 0
entries 4:
Clk: 1423966208
VddInd: 2
CKSVOffsetandDisable: 1536
Clk: 134800
VddInd: 4
CKSVOffsetandDisable: 0
AVFSOffset: 0
ACGEnable: 0
Reserved:
Reserved 0: 0
Reserved 1: 0
Reserved 2: 113
entries 5:
Clk: 458754
VddInd: 0
Clk: 144000
VddInd: 5
CKSVOffsetandDisable: 0
AVFSOffset: 768
ACGEnable: 96
Reserved:
Reserved 0: 234
Reserved 1: 0
Reserved 2: 0
AVFSOffset: 0
entries 6:
Clk: 18432000
VddInd: 0
CKSVOffsetandDisable: 32768
AVFSOffset: 312
ACGEnable: 0
Reserved:
Reserved 0: 0
Reserved 1: 0
Reserved 2: 8
Clk: 152800
VddInd: 6
CKSVOffsetandDisable: 0
AVFSOffset: 0
entries 7:
Clk: 28200
VddInd: 0
CKSVOffsetandDisable: 51500
Clk: 160000
VddInd: 7
CKSVOffsetandDisable: 0
AVFSOffset: 0
ACGEnable: 1
Reserved:
Reserved 0: 248
Reserved 1: 11
Reserved 2: 1
DcefclkDependencyTable:
RevId: 0
NumEntries: 3
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88 changes: 28 additions & 60 deletions test/AMD.RXVegaFrontier.16384.170628.rom.rawdump
Original file line number Diff line number Diff line change
Expand Up @@ -117,66 +117,34 @@ PowerPlay table rev 8.1 size 642 bytes
0x00ba (0186) B 00 VddInd : 0
0x00bb (0187) H 0080 CKSVOffsetandDisable : 32768
0x00bd (0189) H 0000 AVFSOffset : 0
0x00bf (0191) B 1c ACGEnable : 28
0x00c0 (0192) B 83 Reserved : 131
0x00c1 (0193) B 01 Reserved : 1
0x00c2 (0194) B 00 Reserved : 0
0x00c3 (0195) I 01000000 Clk : 1
0x00c7 (0199) B 00 VddInd : 0
0x00c8 (0200) H 88bc CKSVOffsetandDisable : 48264
0x00ca (0202) H 0100 AVFSOffset : 1
0x00cc (0204) B 02 ACGEnable : 2
0x00cd (0205) B 00 Reserved : 0
0x00ce (0206) B 00 Reserved : 0
0x00cf (0207) B 00 Reserved : 0
0x00d0 (0208) I 00b4ef01 Clk : 32486400
0x00d4 (0212) B 00 VddInd : 0
0x00d5 (0213) H 0300 CKSVOffsetandDisable : 3
0x00d7 (0215) H 0000 AVFSOffset : 0
0x00d9 (0217) B 00 ACGEnable : 0
0x00da (0218) B 90 Reserved : 144
0x00db (0219) B 0e Reserved : 14
0x00dc (0220) B 02 Reserved : 2
0x00dd (0221) I 00040000 Clk : 1024
0x00e1 (0225) B 00 VddInd : 0
0x00e2 (0226) H 0080 CKSVOffsetandDisable : 32768
0x00e4 (0228) H 3202 AVFSOffset : 562
0x00e6 (0230) B 00 ACGEnable : 0
0x00e7 (0231) B 05 Reserved : 5
0x00e8 (0232) B 00 Reserved : 0
0x00e9 (0233) B 00 Reserved : 0
0x00ea (0234) I 0000e054 Clk : 1423966208
0x00ee (0238) B 02 VddInd : 2
0x00ef (0239) H 0006 CKSVOffsetandDisable : 1536
0x00f1 (0241) H 0000 AVFSOffset : 0
0x00f3 (0243) B 00 ACGEnable : 0
0x00f4 (0244) B 00 Reserved : 0
0x00f5 (0245) B 00 Reserved : 0
0x00f6 (0246) B 71 Reserved : 113
0x00f7 (0247) I 02000700 Clk : 458754
0x00fb (0251) B 00 VddInd : 0
0x00fc (0252) H 0000 CKSVOffsetandDisable : 0
0x00fe (0254) H 0003 AVFSOffset : 768
0x0100 (0256) B 60 ACGEnable : 96
0x0101 (0257) B ea Reserved : 234
0x0102 (0258) B 00 Reserved : 0
0x0103 (0259) B 00 Reserved : 0
0x0104 (0260) I 00401901 Clk : 18432000
0x0108 (0264) B 00 VddInd : 0
0x0109 (0265) H 0080 CKSVOffsetandDisable : 32768
0x010b (0267) H 3801 AVFSOffset : 312
0x010d (0269) B 00 ACGEnable : 0
0x010e (0270) B 00 Reserved : 0
0x010f (0271) B 00 Reserved : 0
0x0110 (0272) B 08 Reserved : 8
0x0111 (0273) I 286e0000 Clk : 28200
0x0115 (0277) B 00 VddInd : 0
0x0116 (0278) H 2cc9 CKSVOffsetandDisable : 51500
0x0118 (0280) H 0000 AVFSOffset : 0
0x011a (0282) B 01 ACGEnable : 1
0x011b (0283) B f8 Reserved : 248
0x011c (0284) B 0b Reserved : 11
0x011d (0285) B 01 Reserved : 1
0x00bf (0191) I 1c830100 Clk : 99100
0x00c3 (0195) B 01 VddInd : 1
0x00c4 (0196) H 0000 CKSVOffsetandDisable : 0
0x00c6 (0198) H 0000 AVFSOffset : 0
0x00c8 (0200) I 88bc0100 Clk : 113800
0x00cc (0204) B 02 VddInd : 2
0x00cd (0205) H 0000 CKSVOffsetandDisable : 0
0x00cf (0207) H 0000 AVFSOffset : 0
0x00d1 (0209) I b4ef0100 Clk : 126900
0x00d5 (0213) B 03 VddInd : 3
0x00d6 (0214) H 0000 CKSVOffsetandDisable : 0
0x00d8 (0216) H 0000 AVFSOffset : 0
0x00da (0218) I 900e0200 Clk : 134800
0x00de (0222) B 04 VddInd : 4
0x00df (0223) H 0000 CKSVOffsetandDisable : 0
0x00e1 (0225) H 0000 AVFSOffset : 0
0x00e3 (0227) I 80320200 Clk : 144000
0x00e7 (0231) B 05 VddInd : 5
0x00e8 (0232) H 0000 CKSVOffsetandDisable : 0
0x00ea (0234) H 0000 AVFSOffset : 0
0x00ec (0236) I e0540200 Clk : 152800
0x00f0 (0240) B 06 VddInd : 6
0x00f1 (0241) H 0000 CKSVOffsetandDisable : 0
0x00f3 (0243) H 0000 AVFSOffset : 0
0x00f5 (0245) I 00710200 Clk : 160000
0x00f9 (0249) B 07 VddInd : 7
0x00fa (0250) H 0000 CKSVOffsetandDisable : 0
0x00fc (0252) H 0000 AVFSOffset : 0
0x003c (0060) H fe00 DcefclkDependencyTableOffset : 254
0x00fe (0254) B 00 RevId : 0
0x00ff (0255) B 03 NumEntries : 3
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