Merge pull request #1227 from slaclab/xvc-2024.1

Bug fixes and Code Clean Up for xvc-udp

protocols/ruckus.tcl

@@ -7,7 +7,6 @@ loadRuckusTcl "$::DIR_PATH/event-frame-sequencer"
 loadRuckusTcl "$::DIR_PATH/hamming-ecc"
 loadRuckusTcl "$::DIR_PATH/i2c"
 loadRuckusTcl "$::DIR_PATH/jesd204b"
-loadRuckusTcl "$::DIR_PATH/jtag"
 loadRuckusTcl "$::DIR_PATH/line-codes"
 loadRuckusTcl "$::DIR_PATH/mdio"
 loadRuckusTcl "$::DIR_PATH/packetizer"
@@ -30,5 +29,4 @@ if {  $::env(VIVADO_VERSION) > 0.0} {
    loadRuckusTcl "$::DIR_PATH/pmbus"
    loadRuckusTcl "$::DIR_PATH/salt"
    loadRuckusTcl "$::DIR_PATH/spi"
-   loadRuckusTcl "$::DIR_PATH/xvc-udp"
-}
+}

xilinx/ruckus.tcl

@@ -5,6 +5,7 @@ source $::env(RUCKUS_PROC_TCL)
 if {  $::env(VIVADO_VERSION) > 0.0} {
    # Load the Core
    loadRuckusTcl "$::DIR_PATH/general"
+   loadRuckusTcl "$::DIR_PATH/xvc-udp"
 } else {
    loadSource -lib surf -path "$::DIR_PATH/general/rtl/SelectIoRxGearboxAligner.vhd"
    loadSource -lib surf -dir  "$::DIR_PATH/dummy"

protocols/xvc-udp/dcp/7Series/Makefile → xilinx/xvc-udp/dcp/7Series/Makefile

@@ -14,6 +14,9 @@ ifeq ($(filter $(VALID_VARIANTS),$(VARIANT)),)
   $(error "Invalid variant '$(VARIANT)' -- valid variants are: $(VALID_VARIANTS)")
 endif
 
+# Bypass the XVC_DEBUG during surf/ruckus.tcl loading
+export BYPASS_XVC_DEBUG = 1
+
 # Define Firmware Version Number
 export PRJ_VERSION = 0x00000001
 
@@ -26,10 +29,10 @@ export PRJ_PART = XC7Z045FFG900-2
 export PROJECT = UdpDebugBridge$(VARIANT)
 
 # Override the defaults
-export TOP_DIR = $(abspath $(PROJ_DIR)/../../../../)
+export TOP_DIR = $(abspath $(PROJ_DIR)/../../../../../../)
 
 # Use top level makefile
-include ../../../ruckus/system_vivado.mk
+include ../../../../../ruckus/system_vivado.mk
 
 IMAGES_DIR=$(PROJ_DIR)/$(VARIANT)/images
 endif

xilinx/xvc-udp/dcp/7Series/ruckus.tcl

@@ -0,0 +1,10 @@
+# Load RUCKUS environment and library
+source $::env(RUCKUS_PROC_TCL)
+
+# Load submodules' code and constraints
+loadRuckusTcl $::env(MODULES)/surf
+loadRuckusTcl $::DIR_PATH/../../jtag
+
+# Load target's source code and constraints
+loadSource -lib surf -path "$::DIR_PATH/../core/UdpDebugBridgePkg.vhd"
+loadSource -lib surf -path "$::DIR_PATH/../core/UdpDebugBridge$::env(VARIANT)Wrapper.vhd"

protocols/xvc-udp/dcp/UltraScale/Makefile → xilinx/xvc-udp/dcp/UltraScale/Makefile

@@ -14,6 +14,9 @@ ifeq ($(filter $(VALID_VARIANTS),$(VARIANT)),)
   $(error "Invalid variant '$(VARIANT)' -- valid variants are: $(VALID_VARIANTS)")
 endif
 
+# Bypass the XVC_DEBUG during surf/ruckus.tcl loading
+export BYPASS_XVC_DEBUG = 1
+
 # Define Firmware Version Number
 export PRJ_VERSION = 0x00000001
 
@@ -26,10 +29,10 @@ export PRJ_PART = XCKU040-FFVA1156-2-E
 export PROJECT = UdpDebugBridge$(VARIANT)
 
 # Override the defaults
-export TOP_DIR = $(abspath $(PROJ_DIR)/../../../../)
+export TOP_DIR = $(abspath $(PROJ_DIR)/../../../../../../)
 
 # Use top level makefile
-include ../../../ruckus/system_vivado.mk
+include ../../../../../ruckus/system_vivado.mk
 
 IMAGES_DIR=$(PROJ_DIR)/$(VARIANT)/images
 endif

xilinx/xvc-udp/dcp/UltraScale/ruckus.tcl

@@ -0,0 +1,10 @@
+# Load RUCKUS environment and library
+source $::env(RUCKUS_PROC_TCL)
+
+# Load submodules' code and constraints
+loadRuckusTcl $::env(MODULES)/surf
+loadRuckusTcl $::DIR_PATH/../../jtag
+
+# Load target's source code and constraints
+loadSource -lib surf -path "$::DIR_PATH/../core/UdpDebugBridgePkg.vhd"
+loadSource -lib surf -path "$::DIR_PATH/../core/UdpDebugBridge$::env(VARIANT)Wrapper.vhd"

protocols/xvc-udp/dcp/core/UdpDebugBridgeStubWrapper.vhd → xilinx/xvc-udp/dcp/core/UdpDebugBridgeStubWrapper.vhd

@@ -47,7 +47,7 @@ begin
 
    U_AxisJtagDebugBridge : entity surf.AxisJtagDebugBridge(AxisJtagDebugBridgeStub)
       generic map (
-         AXIS_FREQ_G         => AXIS_CLK_FREQ_C,
+         AXIS_FREQ_G         => AXIS_CLK_FREQ_G,
          CLK_DIV2_G          => XVC_TCLK_DIV2_C,
          AXIS_WIDTH_G        => XVC_AXIS_WIDTH_C,
          MEM_DEPTH_G         => XVC_MEM_DEPTH_C,

xilinx/xvc-udp/dcp/core/UdpDebugBridgeWrapper.vhd

@@ -0,0 +1,100 @@
+-------------------------------------------------------------------------------
+-- Company    : SLAC National Accelerator Laboratory
+-------------------------------------------------------------------------------
+-- Description: Wrapper for UDP 'XVC' Server
+-------------------------------------------------------------------------------
+-- This file is part of 'SLAC Firmware Standard Library'.
+-- It is subject to the license terms in the LICENSE.txt file found in the
+-- top-level directory of this distribution and at:
+--    https://confluence.slac.stanford.edu/display/ppareg/LICENSE.html.
+-- No part of 'SLAC Firmware Standard Library', including this file,
+-- may be copied, modified, propagated, or distributed except according to
+-- the terms contained in the LICENSE.txt file.
+-------------------------------------------------------------------------------
+
+library ieee;
+use ieee.std_logic_1164.all;
+use ieee.std_logic_unsigned.all;
+use ieee.std_logic_arith.all;
+
+library surf;
+use surf.StdRtlPkg.all;
+use surf.AxiStreamPkg.all;
+use surf.SsiPkg.all;
+use surf.EthMacPkg.all;
+
+entity UdpDebugBridgeWrapper is
+   generic (
+      TPD_G           : time := 1 ns;
+      AXIS_CLK_FREQ_G : real := 156.25e6);
+   port (
+      -- Clock and Reset
+      clk            : in  sl;
+      rst            : in  sl;
+      -- UDP XVC Interface
+      obServerMaster : in  AxiStreamMasterType;
+      obServerSlave  : out AxiStreamSlaveType;
+      ibServerMaster : out AxiStreamMasterType;
+      ibServerSlave  : in  AxiStreamSlaveType);
+end UdpDebugBridgeWrapper;
+
+architecture rtl of UdpDebugBridgeWrapper is
+
+   type SofRegType is record
+      sof : sl;
+   end record SofRegType;
+
+   constant SOF_REG_INIT_C : SofRegType := (sof => '1');
+
+   signal rSof   : SofRegType := SOF_REG_INIT_C;
+   signal rinSof : SofRegType;
+
+   signal mXvcServerTdo : AxiStreamMasterType;
+
+begin
+
+   ----------------------------
+   -- 'XVC' Server @2542 (modified protocol to work over UDP)
+   ----------------------------
+   P_SOF_COMB : process(ibServerSlave, mXvcServerTdo, rSof) is
+      variable v : SofRegType;
+   begin
+      v := rSof;
+      if ((mXvcServerTdo.tValid and ibServerSlave.tReady) = '1') then
+         v.sof := mXvcServerTdo.tLast;
+      end if;
+      rinSof <= v;
+   end process P_SOF_COMB;
+
+   P_SOF_SEQ : process(clk) is
+   begin
+      if (rising_edge(clk)) then
+         if (rst = '1') then
+            rSof <= SOF_REG_INIT_C after TPD_G;
+         else
+            rSof <= rinSof after TPD_G;
+         end if;
+      end if;
+   end process P_SOF_SEQ;
+
+   -- splice in the SOF bit
+   P_SOF_SPLICE : process(mXvcServerTdo, rSof) is
+      variable v : AxiStreamMasterType;
+   begin
+      v              := mXvcServerTdo;
+      ssiSetUserSof(EMAC_AXIS_CONFIG_C, v, rSof.sof);
+      ibServerMaster <= v;
+   end process P_SOF_SPLICE;
+
+   U_XvcServer : entity surf.UdpDebugBridge
+      generic map (
+         AXIS_CLK_FREQ_G => AXIS_CLK_FREQ_G)
+      port map (
+         axisClk  => clk,
+         axisRst  => rst,
+         mAxisReq => obServerMaster,
+         sAxisReq => obServerSlave,
+         mAxisTdo => mXvcServerTdo,
+         sAxisTdo => ibServerSlave);
+
+end rtl;

protocols/xvc-udp/rtl/UdpDebugBridgeWrapper.vhd → xilinx/xvc-udp/rtl/UdpDebugBridgeWrapper.vhd

@@ -3,11 +3,11 @@
 -------------------------------------------------------------------------------
 -- Description: Wrapper for UDP 'XVC' Server
 -------------------------------------------------------------------------------
--- This file is part of 'xvc-udp-debug-bridge'.
+-- This file is part of 'SLAC Firmware Standard Library'.
 -- It is subject to the license terms in the LICENSE.txt file found in the
 -- top-level directory of this distribution and at:
 --    https://confluence.slac.stanford.edu/display/ppareg/LICENSE.html.
--- No part of 'xvc-udp-debug-bridge', including this file,
+-- No part of 'SLAC Firmware Standard Library', including this file,
 -- may be copied, modified, propagated, or distributed except according to
 -- the terms contained in the LICENSE.txt file.
 -------------------------------------------------------------------------------

protocols/xvc-udp/ruckus.tcl → xilinx/xvc-udp/ruckus.tcl

@@ -4,11 +4,14 @@ source $::env(RUCKUS_PROC_TCL)
 if { [isVersal] == true } {
    set versalType true
 
+} elseif { [info exists ::env(BYPASS_XVC_DEBUG)] == 1 && $::env(BYPASS_XVC_DEBUG) == 1 } {
+   puts "Note: BYPASS_XVC_DEBUG = 1"
+
 # Check for version 2018.3 of Vivado (or later)
 } elseif { $::env(VIVADO_VERSION) >= 2018.3 } {
 
-   # Load the wrapper source code
-   loadSource -lib surf -dir "$::DIR_PATH/rtl"
+   # Load the DMA wrapper source code
+   loadSource -lib surf -path "$::DIR_PATH/rtl/DmaXvcWrapper.vhd"
 
    # Get the family type
    set family [getFpgaArch]
@@ -31,6 +34,7 @@ if { [isVersal] == true } {
    }
 
    if { [info exists ::env(USE_XVC_DEBUG)] != 1 || $::env(USE_XVC_DEBUG) == 0 } {
+      loadSource -lib surf -path "$::DIR_PATH/rtl/UdpDebugBridgeWrapper.vhd"
       loadSource -lib surf -path "$::DIR_PATH/dcp/${dirType}/Stub/images/UdpDebugBridge.dcp"
 
    } elseif { $::env(USE_XVC_DEBUG) == -1 } {
@@ -39,8 +43,18 @@ if { [isVersal] == true } {
       puts "and it is the application's responsibility"
       puts "to define a suitable implementation."
 
-   } else {
+   } elseif { [info exists ::env(USE_XVC_DEBUG_IP_CORE)] != 1 || $::env(USE_XVC_DEBUG_IP_CORE) == 0 } {
+
+      loadSource -lib surf -path "$::DIR_PATH/rtl/UdpDebugBridgeWrapper.vhd"
       loadSource -lib surf -path "$::DIR_PATH/dcp/${dirType}/Impl/images/UdpDebugBridge.dcp"
+
+   } else {
+
+      loadRuckusTcl $::DIR_PATH/jtag
+      loadSource -lib surf -path "$::DIR_PATH/dcp/core/UdpDebugBridgePkg.vhd"
+      loadSource -lib surf -path "$::DIR_PATH/dcp/core/UdpDebugBridgeImplWrapper.vhd"
+      loadSource -lib surf -path "$::DIR_PATH/dcp/core/UdpDebugBridgeWrapper.vhd"
+
    }
 
 } else {