Rust FastLanes #345
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Rust FastLanes #345
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Closing in favour of https://github.com/spiraldb/fastlanes |
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Full Rust implementation of FastLanes BitPacking.
It can almost be done without macros. We need a macro in order to force an inlined loop. This essentially repeats the code within the macro block T times, meaning the compiler sees it as unrolled and performs auto-vectorisation.
This code is 1:1 with the FastLanes scalar auto-vectorised implementation, meaning it has no explicit SIMD dependencies.
Unlike the Zig code, it doesn't unroll all loops, meaning the code size should be more reasonable.
Vectorized ASM on ARM:
Vectorized ASM on x86:
