#0: add .ttinsn to sfpi

[nathan-TT]

Ticket

NA

Problem description

We currently create bespoke sfpu insns using .word, that has 2 shortcomings

1. because of mapping symbols, they never disassemble to instructions (the dissassembler always shows them as data)
2. we have to manually swizzle them (move 2 bits from the front to the back)

We can't use .insn because spu insns do not use the regular riscv encoding, so its length checking goes wrong.

What's changed

Added .ttinsn to the assembler. This will do the swizzling, and arrange for them to be disassemblable.
Alter the ckernel_ops.h header appropriately (although this is machine-generated the generator is unavailable)
There are other instances of the ckernel_ops.h headers in submodules, that will also need updating.

This makes disassembling kernels much more pleasant. See SFPI release notes for example (https://github.com/tenstorrent/sfpi/releases/tag/v6.2.0)

Checklist

• [ YES] All post commit CI passes
• [ YES] Blackhole Post commit CI passes (if applicable)
• Model regression CI passes (if applicable)
• Device performance regression CI passes (if applicable)
• (For models and ops writers) Full new models tests CI passes (if applicable)
• New/Existing tests provide coverage for changes