corev.yml.j2: disable corev_ovpsim target (missing dl)

tum-ei-eda · Jan 28, 2024 · 8905dcf · 8905dcf
1 parent d453008
commit 8905dcf
Showing 1 changed file with 5 additions and 3 deletions.
diff --git a/resources/templates/corev.yml.j2 b/resources/templates/corev.yml.j2
@@ -209,12 +209,14 @@ targets:
       cachesim: true
       log_instrs: true
   ovpsim:
-    enabled: true
+    # enabled: true
+    enabled: false
     features:
       vext: false
       pext: false
   corev_ovpsim:
-    enabled: true
+    # enabled: true
+    enabled: false
     features:
       xcorev: true
   cv32e40p:
@@ -270,7 +272,7 @@ vars:
   llvm.dl_url: "https://syncandshare.lrz.de/dl/fiWBtDLWz17RBc1Yd4VDW7/LLVM/corev/Archive/corev_llvm_custom.tar.xz"
   riscv_gcc.dl_url: "https://syncandshare.lrz.de/dl/fiWBtDLWz17RBc1Yd4VDW7/GCC/default/2023.11.27/Ubuntu/20.04/rv32im_ilp32.tar.xz"
   # riscv_gcc.dl_url: "https://buildbot.embecosm.com/job/corev-gcc-ubuntu2004/25/artifact/corev-openhw-gcc-ubuntu2004-20231205.tar.gz"  # TODO: use corev gcc?
-  corev_ovpsim.version: "v20231026"
+  # corev_ovpsim.version: "v20231026"
   # spike.keep_build_dir: false
   # etiss.keep_build_dir: false
   spikepk.default_arch: rv32im