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adjust unit tests for removals
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Robbepop committed Oct 21, 2024
1 parent a2e444a commit 3a98c23
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Showing 24 changed files with 366 additions and 117 deletions.
4 changes: 2 additions & 2 deletions crates/wasmi/src/engine/translator/tests/fuzz/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -205,7 +205,7 @@ fn fuzz_regression_12_f32() {
]))
.expect_func(ExpectedFunc::new([
Instruction::copy_imm32(Reg::from(0), u32::MAX),
Instruction::f32_ge(Reg::from(1), Reg::from(0), Reg::from(0)),
Instruction::f32_le(Reg::from(1), Reg::from(0), Reg::from(0)),
Instruction::return_nez(1),
Instruction::trap(TrapCode::UnreachableCodeReached),
]))
Expand All @@ -229,7 +229,7 @@ fn fuzz_regression_12_f64() {
.expect_func(
ExpectedFunc::new([
Instruction::copy(0, -1),
Instruction::f64_ge(Reg::from(1), Reg::from(0), Reg::from(0)),
Instruction::f64_le(Reg::from(1), Reg::from(0), Reg::from(0)),
Instruction::return_nez(1),
Instruction::trap(TrapCode::UnreachableCodeReached),
])
Expand Down
10 changes: 9 additions & 1 deletion crates/wasmi/src/engine/translator/tests/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -32,11 +32,19 @@ fn create_module(config: &Config, bytes: &[u8]) -> Module {
/// Used to swap operands of a `rev` variant [`Instruction`] constructor.
macro_rules! swap_ops {
($fn_name:path) => {
|result: Reg, lhs: Const16<_>, rhs: Reg| -> Instruction { $fn_name(result, rhs, lhs) }
|result: Reg, lhs, rhs| -> Instruction { $fn_name(result, rhs, lhs) }
};
}
use swap_ops;

/// Used to swap `lhs` and `rhs` operands of a fused `cmp+branch` instruction.
macro_rules! swap_cmp_br_ops {
($fn_name:path) => {
|lhs, rhs, offset: BranchOffset16| -> Instruction { $fn_name(rhs, lhs, offset) }
};
}
use swap_cmp_br_ops;

/// Asserts that the given `wasm` bytes yield functions with expected instructions.
///
/// Uses the given [`Config`] to configure the [`Engine`] that the tests are run on.
Expand Down
8 changes: 4 additions & 4 deletions crates/wasmi/src/engine/translator/tests/op/cmp/f32_ge.rs
Original file line number Diff line number Diff line change
Expand Up @@ -6,7 +6,7 @@ const WASM_OP: WasmOp = WasmOp::cmp(WasmType::F32, "ge");
#[cfg_attr(miri, ignore)]
fn same_reg() {
let expected = [
Instruction::f32_ge(Reg::from(1), Reg::from(0), Reg::from(0)),
Instruction::f32_le(Reg::from(1), Reg::from(0), Reg::from(0)),
Instruction::return_reg(1),
];
test_binary_same_reg(WASM_OP, expected)
Expand All @@ -15,19 +15,19 @@ fn same_reg() {
#[test]
#[cfg_attr(miri, ignore)]
fn reg_reg() {
test_binary_reg_reg(WASM_OP, Instruction::f32_ge)
test_binary_reg_reg(WASM_OP, swap_ops!(Instruction::f32_le))
}

#[test]
#[cfg_attr(miri, ignore)]
fn reg_imm() {
test_binary_reg_imm32(WASM_OP, 1.0_f32, Instruction::f32_ge)
test_binary_reg_imm32(WASM_OP, 1.0_f32, swap_ops!(Instruction::f32_le))
}

#[test]
#[cfg_attr(miri, ignore)]
fn reg_imm_lhs() {
test_binary_reg_imm32_lhs(WASM_OP, 1.0_f32, Instruction::f32_ge)
test_binary_reg_imm32_lhs(WASM_OP, 1.0_f32, swap_ops!(Instruction::f32_le))
}

#[test]
Expand Down
6 changes: 3 additions & 3 deletions crates/wasmi/src/engine/translator/tests/op/cmp/f32_gt.rs
Original file line number Diff line number Diff line change
Expand Up @@ -14,19 +14,19 @@ fn same_reg() {
#[test]
#[cfg_attr(miri, ignore)]
fn reg_reg() {
test_binary_reg_reg(WASM_OP, Instruction::f32_gt)
test_binary_reg_reg(WASM_OP, swap_ops!(Instruction::f32_lt))
}

#[test]
#[cfg_attr(miri, ignore)]
fn reg_imm() {
test_binary_reg_imm32(WASM_OP, 1.0_f32, Instruction::f32_gt)
test_binary_reg_imm32(WASM_OP, 1.0_f32, swap_ops!(Instruction::f32_lt))
}

#[test]
#[cfg_attr(miri, ignore)]
fn reg_imm_lhs() {
test_binary_reg_imm32_lhs(WASM_OP, 1.0_f32, Instruction::f32_gt)
test_binary_reg_imm32_lhs(WASM_OP, 1.0_f32, swap_ops!(Instruction::f32_lt))
}

#[test]
Expand Down
8 changes: 4 additions & 4 deletions crates/wasmi/src/engine/translator/tests/op/cmp/f64_ge.rs
Original file line number Diff line number Diff line change
Expand Up @@ -6,7 +6,7 @@ const WASM_OP: WasmOp = WasmOp::cmp(WasmType::F64, "ge");
#[cfg_attr(miri, ignore)]
fn same_reg() {
let expected = [
Instruction::f64_ge(Reg::from(1), Reg::from(0), Reg::from(0)),
Instruction::f64_le(Reg::from(1), Reg::from(0), Reg::from(0)),
Instruction::return_reg(1),
];
test_binary_same_reg(WASM_OP, expected)
Expand All @@ -15,19 +15,19 @@ fn same_reg() {
#[test]
#[cfg_attr(miri, ignore)]
fn reg_reg() {
test_binary_reg_reg(WASM_OP, Instruction::f64_ge)
test_binary_reg_reg(WASM_OP, swap_ops!(Instruction::f64_le))
}

#[test]
#[cfg_attr(miri, ignore)]
fn reg_imm() {
test_binary_reg_imm32(WASM_OP, 1.0, Instruction::f64_ge)
test_binary_reg_imm32(WASM_OP, 1.0, swap_ops!(Instruction::f64_le))
}

#[test]
#[cfg_attr(miri, ignore)]
fn reg_imm_lhs() {
test_binary_reg_imm32_lhs(WASM_OP, 1.0, Instruction::f64_ge)
test_binary_reg_imm32_lhs(WASM_OP, 1.0, swap_ops!(Instruction::f64_le))
}

#[test]
Expand Down
6 changes: 3 additions & 3 deletions crates/wasmi/src/engine/translator/tests/op/cmp/f64_gt.rs
Original file line number Diff line number Diff line change
Expand Up @@ -14,19 +14,19 @@ fn same_reg() {
#[test]
#[cfg_attr(miri, ignore)]
fn reg_reg() {
test_binary_reg_reg(WASM_OP, Instruction::f64_gt)
test_binary_reg_reg(WASM_OP, swap_ops!(Instruction::f64_lt))
}

#[test]
#[cfg_attr(miri, ignore)]
fn reg_imm() {
test_binary_reg_imm32(WASM_OP, 1.0, Instruction::f64_gt)
test_binary_reg_imm32(WASM_OP, 1.0, swap_ops!(Instruction::f64_lt))
}

#[test]
#[cfg_attr(miri, ignore)]
fn reg_imm_lhs() {
test_binary_reg_imm32_lhs(WASM_OP, 1.0, Instruction::f64_gt)
test_binary_reg_imm32_lhs(WASM_OP, 1.0, swap_ops!(Instruction::f64_lt))
}

#[test]
Expand Down
8 changes: 4 additions & 4 deletions crates/wasmi/src/engine/translator/tests/op/cmp/i32_ge_s.rs
Original file line number Diff line number Diff line change
Expand Up @@ -14,13 +14,13 @@ fn same_reg() {
#[test]
#[cfg_attr(miri, ignore)]
fn reg_reg() {
test_binary_reg_reg(WASM_OP, Instruction::i32_ge_s)
test_binary_reg_reg(WASM_OP, swap_ops!(Instruction::i32_le_s))
}

#[test]
#[cfg_attr(miri, ignore)]
fn reg_imm16() {
test_binary_reg_imm16_rhs::<i32>(WASM_OP, 100, Instruction::i32_ge_s_imm16_rhs)
test_binary_reg_imm16_rhs::<i32>(WASM_OP, 100, swap_ops!(Instruction::i32_le_s_imm16_lhs))
}

#[test]
Expand All @@ -32,13 +32,13 @@ fn reg_imm16_lhs() {
#[test]
#[cfg_attr(miri, ignore)]
fn reg_imm() {
test_binary_reg_imm32(WASM_OP, 100_000, Instruction::i32_ge_s)
test_binary_reg_imm32(WASM_OP, 100_000, swap_ops!(Instruction::i32_le_s))
}

#[test]
#[cfg_attr(miri, ignore)]
fn reg_imm_lhs() {
test_binary_reg_imm32_lhs(WASM_OP, 100_000, Instruction::i32_ge_s)
test_binary_reg_imm32_lhs(WASM_OP, 100_000, swap_ops!(Instruction::i32_le_s))
}

#[test]
Expand Down
8 changes: 4 additions & 4 deletions crates/wasmi/src/engine/translator/tests/op/cmp/i32_ge_u.rs
Original file line number Diff line number Diff line change
Expand Up @@ -14,13 +14,13 @@ fn same_reg() {
#[test]
#[cfg_attr(miri, ignore)]
fn reg_reg() {
test_binary_reg_reg(WASM_OP, Instruction::i32_ge_u)
test_binary_reg_reg(WASM_OP, swap_ops!(Instruction::i32_le_u))
}

#[test]
#[cfg_attr(miri, ignore)]
fn reg_imm16() {
test_binary_reg_imm16_rhs::<u32>(WASM_OP, 100, Instruction::i32_ge_u_imm16_rhs)
test_binary_reg_imm16_rhs::<u32>(WASM_OP, 100, swap_ops!(Instruction::i32_le_u_imm16_lhs))
}

#[test]
Expand All @@ -32,13 +32,13 @@ fn reg_imm16_lhs() {
#[test]
#[cfg_attr(miri, ignore)]
fn reg_imm() {
test_binary_reg_imm32(WASM_OP, 100_000, Instruction::i32_ge_u)
test_binary_reg_imm32(WASM_OP, 100_000, swap_ops!(Instruction::i32_le_u))
}

#[test]
#[cfg_attr(miri, ignore)]
fn reg_imm_lhs() {
test_binary_reg_imm32_lhs(WASM_OP, 100_000, Instruction::i32_ge_u)
test_binary_reg_imm32_lhs(WASM_OP, 100_000, swap_ops!(Instruction::i32_le_u))
}

#[test]
Expand Down
8 changes: 4 additions & 4 deletions crates/wasmi/src/engine/translator/tests/op/cmp/i32_gt_s.rs
Original file line number Diff line number Diff line change
Expand Up @@ -14,13 +14,13 @@ fn same_reg() {
#[test]
#[cfg_attr(miri, ignore)]
fn reg_reg() {
test_binary_reg_reg(WASM_OP, Instruction::i32_gt_s)
test_binary_reg_reg(WASM_OP, swap_ops!(Instruction::i32_lt_s))
}

#[test]
#[cfg_attr(miri, ignore)]
fn reg_imm16() {
test_binary_reg_imm16_rhs::<i32>(WASM_OP, 100, Instruction::i32_gt_s_imm16_rhs)
test_binary_reg_imm16_rhs::<i32>(WASM_OP, 100, swap_ops!(Instruction::i32_lt_s_imm16_lhs))
}

#[test]
Expand All @@ -32,13 +32,13 @@ fn reg_imm16_lhs() {
#[test]
#[cfg_attr(miri, ignore)]
fn reg_imm() {
test_binary_reg_imm32(WASM_OP, 100_000, Instruction::i32_gt_s)
test_binary_reg_imm32(WASM_OP, 100_000, swap_ops!(Instruction::i32_lt_s))
}

#[test]
#[cfg_attr(miri, ignore)]
fn reg_imm_lhs() {
test_binary_reg_imm32_lhs(WASM_OP, 100_000, Instruction::i32_gt_s)
test_binary_reg_imm32_lhs(WASM_OP, 100_000, swap_ops!(Instruction::i32_lt_s))
}

#[test]
Expand Down
8 changes: 4 additions & 4 deletions crates/wasmi/src/engine/translator/tests/op/cmp/i32_gt_u.rs
Original file line number Diff line number Diff line change
Expand Up @@ -14,13 +14,13 @@ fn same_reg() {
#[test]
#[cfg_attr(miri, ignore)]
fn reg_reg() {
test_binary_reg_reg(WASM_OP, Instruction::i32_gt_u)
test_binary_reg_reg(WASM_OP, swap_ops!(Instruction::i32_lt_u))
}

#[test]
#[cfg_attr(miri, ignore)]
fn reg_imm16() {
test_binary_reg_imm16_rhs::<u32>(WASM_OP, 100, Instruction::i32_gt_u_imm16_rhs)
test_binary_reg_imm16_rhs::<u32>(WASM_OP, 100, swap_ops!(Instruction::i32_lt_u_imm16_lhs))
}

#[test]
Expand All @@ -32,13 +32,13 @@ fn reg_imm16_lhs() {
#[test]
#[cfg_attr(miri, ignore)]
fn reg_imm() {
test_binary_reg_imm32(WASM_OP, 100_000, Instruction::i32_gt_u)
test_binary_reg_imm32(WASM_OP, 100_000, swap_ops!(Instruction::i32_lt_u))
}

#[test]
#[cfg_attr(miri, ignore)]
fn reg_imm_lhs() {
test_binary_reg_imm32_lhs(WASM_OP, 100_000, Instruction::i32_gt_u)
test_binary_reg_imm32_lhs(WASM_OP, 100_000, swap_ops!(Instruction::i32_lt_u))
}

#[test]
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -26,7 +26,7 @@ fn reg_imm16() {
#[test]
#[cfg_attr(miri, ignore)]
fn reg_imm16_lhs() {
test_binary_reg_imm16_lhs::<i32>(WASM_OP, 100, swap_ops!(Instruction::i32_ge_s_imm16_rhs))
test_binary_reg_imm16_lhs::<i32>(WASM_OP, 100, Instruction::i32_le_s_imm16_lhs)
}

#[test]
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -26,7 +26,7 @@ fn reg_imm16() {
#[test]
#[cfg_attr(miri, ignore)]
fn reg_imm16_lhs() {
test_binary_reg_imm16_lhs::<u32>(WASM_OP, 100, swap_ops!(Instruction::i32_ge_u_imm16_rhs))
test_binary_reg_imm16_lhs::<u32>(WASM_OP, 100, Instruction::i32_le_u_imm16_lhs)
}

#[test]
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -26,7 +26,7 @@ fn reg_imm16() {
#[test]
#[cfg_attr(miri, ignore)]
fn reg_imm16_lhs() {
test_binary_reg_imm16_lhs::<i32>(WASM_OP, 100, swap_ops!(Instruction::i32_gt_s_imm16_rhs))
test_binary_reg_imm16_lhs::<i32>(WASM_OP, 100, Instruction::i32_lt_s_imm16_lhs)
}

#[test]
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -26,7 +26,7 @@ fn reg_imm16() {
#[test]
#[cfg_attr(miri, ignore)]
fn reg_imm16_lhs() {
test_binary_reg_imm16_lhs::<u32>(WASM_OP, 100, swap_ops!(Instruction::i32_gt_u_imm16_rhs))
test_binary_reg_imm16_lhs::<u32>(WASM_OP, 100, Instruction::i32_lt_u_imm16_lhs)
}

#[test]
Expand Down
8 changes: 4 additions & 4 deletions crates/wasmi/src/engine/translator/tests/op/cmp/i64_ge_s.rs
Original file line number Diff line number Diff line change
Expand Up @@ -14,13 +14,13 @@ fn same_reg() {
#[test]
#[cfg_attr(miri, ignore)]
fn reg_reg() {
test_binary_reg_reg(WASM_OP, Instruction::i64_ge_s)
test_binary_reg_reg(WASM_OP, swap_ops!(Instruction::i64_le_s))
}

#[test]
#[cfg_attr(miri, ignore)]
fn reg_imm16() {
test_binary_reg_imm16_rhs::<i64>(WASM_OP, 100, Instruction::i64_ge_s_imm16_rhs)
test_binary_reg_imm16_rhs::<i64>(WASM_OP, 100, swap_ops!(Instruction::i64_le_s_imm16_lhs))
}

#[test]
Expand All @@ -32,13 +32,13 @@ fn reg_imm16_lhs() {
#[test]
#[cfg_attr(miri, ignore)]
fn reg_imm() {
test_binary_reg_imm32(WASM_OP, 100_000, Instruction::i64_ge_s)
test_binary_reg_imm32(WASM_OP, 100_000, swap_ops!(Instruction::i64_le_s))
}

#[test]
#[cfg_attr(miri, ignore)]
fn reg_imm_lhs() {
test_binary_reg_imm32_lhs(WASM_OP, 100_000, Instruction::i64_ge_s)
test_binary_reg_imm32_lhs(WASM_OP, 100_000, swap_ops!(Instruction::i64_le_s))
}

#[test]
Expand Down
8 changes: 4 additions & 4 deletions crates/wasmi/src/engine/translator/tests/op/cmp/i64_ge_u.rs
Original file line number Diff line number Diff line change
Expand Up @@ -14,13 +14,13 @@ fn same_reg() {
#[test]
#[cfg_attr(miri, ignore)]
fn reg_reg() {
test_binary_reg_reg(WASM_OP, Instruction::i64_ge_u)
test_binary_reg_reg(WASM_OP, swap_ops!(Instruction::i64_le_u))
}

#[test]
#[cfg_attr(miri, ignore)]
fn reg_imm16() {
test_binary_reg_imm16_rhs::<u64>(WASM_OP, 100, Instruction::i64_ge_u_imm16_rhs)
test_binary_reg_imm16_rhs::<u64>(WASM_OP, 100, swap_ops!(Instruction::i64_le_u_imm16_lhs))
}

#[test]
Expand All @@ -32,13 +32,13 @@ fn reg_imm16_lhs() {
#[test]
#[cfg_attr(miri, ignore)]
fn reg_imm() {
test_binary_reg_imm32(WASM_OP, 100_000, Instruction::i64_ge_u)
test_binary_reg_imm32(WASM_OP, 100_000, swap_ops!(Instruction::i64_le_u))
}

#[test]
#[cfg_attr(miri, ignore)]
fn reg_imm_lhs() {
test_binary_reg_imm32_lhs(WASM_OP, 100_000, Instruction::i64_ge_u)
test_binary_reg_imm32_lhs(WASM_OP, 100_000, swap_ops!(Instruction::i64_le_u))
}

#[test]
Expand Down
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