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1. LOROF LOROF Public

   Linux-on-RISCV-on-FPGA. Goal is to design, verify, and implement on FPGA a RISC-V RV32IMA_Zicsr_Zifencei implementation with supervisor and user mode support, successfully booting and running Linux…

   SystemVerilog

2. My-UVMF My-UVMF Public

   Jinja2 and YAML based UVM testbench generator. Similar to UVMF but developing as a means to practice UVM and integrate into my D&V projects down the line.

   Jinja

3. Eng_Deu_Translation_RNN Eng_Deu_Translation_RNN Public

   Recurrent Neural Network designed for sequence translation from English to German and vice versa. Implemented with a Gated Recurrent Unit structure featuring an attention mechanism. Trained on a co…

   Jupyter Notebook

4. UVM-Testbench-FooBar UVM-Testbench-FooBar Public

   UVM testbench.

   SystemVerilog

5. Portfolio Portfolio Public

   Portfolio to showcase my experience, skills and projects.

   HTML

6. Number-Base-Converter-App Number-Base-Converter-App Public

   Number base conversion tool I use in my day to day ECE projects and homeworks.

   Python