Aux spi port and roll-up other PRs

.travis.yml

@@ -60,9 +60,15 @@ matrix:
     #
     # Test latest node and historical LTS releases on Linux/amd64 only.
     #
-    #- name: 'Ubuntu - Node.js 15'
-    #  os: linux
-    #  node_js: "15"
+    - name: 'Ubuntu - Node.js 18'
+      os: linux
+      node_js: "18"
+    - name: 'Ubuntu - Node.js 16'
+      os: linux
+      node_js: "16"
+    - name: 'Ubuntu - Node.js 15'
+      os: linux
+      node_js: "15"
     - name: 'Ubuntu - Node.js 14'
       os: linux
       node_js: "14"

README.md

@@ -17,7 +17,7 @@ as i²c, PWM, and SPI.
 
 * Raspberry Pi Models: A, B, A+, B+, 2, 3, 4, 400, Compute Module, Zero.
 * SunXi (Allwinner V40) Models: Orange Pi Zero, Banana Pi M2 Zero / Berry.
-* Node.js Versions: 0.8, 0.10, 0.12, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14.
+* Node.js Versions: 0.8, 0.10, 0.12, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 16, 18, 20.
 
 Currently only basic GPIO is supported on the SunXi chipsets.
 
@@ -33,7 +33,7 @@ above.
 Install the latest using npm:
 
 ```console
-$ npm install rpio
+$ npm install @remarkablearts/rpio
 ```
 
 ## Important System Requirements
@@ -875,6 +875,12 @@ controller handling the chip enable, clock and data in/out functions.
  *   26 |   CE1
  */
 ```
+#### aux SPI
+
+The aux SPI uses the same function names prefixed with aux_, and uses pins 35,
+36,38 and 40. Note that chip_select, cs_polarity, and setDataMode are missing
+as these are not present in the underlying bcm2835 library this module is 
+relying on. The CSPI1_CE2 (pin 38) line is fixed as CS for the aux_spi.
 
 Once SPI is enabled, the SPI pins are unavailable for GPIO use until `spiEnd()`
 is called.
@@ -1013,4 +1019,6 @@ after the first call.
 
 Mike McCauley wrote `src/bcm2835.{c,h}` which are under the GPL.
 
-I wrote the rest, which is under the ISC license unless otherwise specified.
+J Perkin wrote the rest, which is under the ISC license unless otherwise specified.
+
+Mark van der Pol added aux_spi support.

lib/rpio.js

@@ -94,7 +94,8 @@ var rpio_options = {
 	gpiomem: true,
 	mapping: 'physical',
 	mock: false,
-	close_on_exit: true
+	close_on_exit: true,
+	device_tree_path: '/proc/device-tree/model',
 };
 
 /* Default mock mode if hardware is unsupported. */
@@ -539,7 +540,7 @@ function detect_pinmap()
 	var model;
 
 	try {
-		model = fs.readFileSync('/proc/device-tree/model', 'ascii');
+		model = fs.readFileSync(rpio_options.device_tree_path, 'ascii');
 		model = model.replace(/\0+$/, '');
 	} catch (err) {
 		return false;
@@ -589,27 +590,29 @@ function detect_pinmap()
 		return true;
 	}
 
+	/*
+	 * Banana Pi M2 Zero (H2+)
+	 * Banana Pi M2P Zero (H2+) (40 pin)
+	 */
+	if ((m = model.match(/^sun8iw7p1/)) ||
+			(m = model.match(/Banana Pi BPI-M2-Zero/))) {
+		soctype = rpio.prototype.SOC_SUNXI;
+		pinmap = 'PINMAP_BPI_M2Z';
+		return true;
+	}
 	/*
 	 * Orange Pi Zero (H2+)
 	 *
 	 * XXX: According to linux-sunxi.org sun8iw7p may match 40-pin models?
+	 * Zw1d: And it does. That's why BPI-M2-Zero definition was moved above
+	 * and sun8iw7p1 was added.
 	 */
 	if ((m = model.match(/^sun8iw7p/)) ||
 	    (m = model.match(/Orange Pi Zero/))) {
 		soctype = rpio.prototype.SOC_SUNXI;
 		pinmap = 'PINMAP_OPI_26';
 		return true;
 	}
-
-	/*
-	 * Banana Pi M2 Zero (H2+)
-	 */
-	if (m = model.match(/Banana Pi BPI-M2-Zero/)) {
-		soctype = rpio.prototype.SOC_SUNXI;
-		pinmap = 'PINMAP_BPI_M2Z';
-		return true;
-	}
-
 	/*
 	 * Banana Pi M2 Ultra (R40, V40)
 	 */