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Pseudo-Instructions, test cases, and bug fixes #355

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merged 11 commits into from
Mar 13, 2024
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Geetis
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@Geetis Geetis commented Mar 7, 2024

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@brooksmckinley brooksmckinley left a comment

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Great work! Just a couple potential changes, lemme know if you have any input.

src/bin/main.rs Outdated
@@ -38,7 +41,8 @@ use yew_hooks::prelude::*;
// To load in the Fibonacci example, uncomment the CONTENT and fib_model lines
// and comment the code, language, and text_model lines. IMPORTANT:
// rename fib_model to text_model to have it work.
const CONTENT: &str = include_str!("../../static/assembly_examples/floating_point.asm");
const CONTENT: &str = include_str!("../../static/assembly_examples/riscv_test.asm");
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Can you add some sort of toggle to the interface so we can switch between RISC-V and MIPS modes? I don't really care who does it or where but it's something that we should probably have at this point.

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I put that there so the frontend would implement the toggle/dropdown as they wished.

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In that case, do you mind switching this back to a MIPS example just to make it a little easier to debug the rest of the program in the meantime?

src/bin/main.rs Outdated Show resolved Hide resolved
src/parser/parser_assembler_main.rs Outdated Show resolved Hide resolved
src/parser/parsing.rs Outdated Show resolved Hide resolved
src/parser/pseudo_instruction_parsing.rs Show resolved Hide resolved
src/parser/pseudo_instruction_parsing.rs Show resolved Hide resolved
@brooksmckinley brooksmckinley merged commit 2242acf into swim-v2 Mar 13, 2024
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@brooksmckinley brooksmckinley deleted the risc-v-parser branch March 13, 2024 20:20
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2 participants