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Pseudo-Instructions, test cases, and bug fixes #355

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Mar 13, 2024
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12 changes: 8 additions & 4 deletions src/bin/main.rs
Original file line number Diff line number Diff line change
Expand Up @@ -9,7 +9,6 @@ use monaco::{
sys::{editor::IMarkerData, MarkerSeverity},
};
use std::rc::Rc;
use swim::agent::datapath_communicator::DatapathCommunicator;
use swim::agent::datapath_reducer::DatapathReducer;
use swim::agent::EmulationCoreAgent;
use swim::emulation_core::mips::datapath::Stage;
Expand All @@ -18,6 +17,10 @@ use swim::parser::parser_structs_and_enums::ProgramInfo;
use swim::ui::footer::component::Footer;
use swim::ui::regview::component::Regview;
use swim::ui::swim_editor::component::SwimEditor;
use swim::{
agent::datapath_communicator::DatapathCommunicator,
parser::parser_structs_and_enums::Architecture,
};
use swim::{
emulation_core::{architectures::AvailableDatapaths, mips::instruction::get_string_version},
ui::{
Expand All @@ -38,7 +41,8 @@ use yew_hooks::prelude::*;
// To load in the Fibonacci example, uncomment the CONTENT and fib_model lines
// and comment the code, language, and text_model lines. IMPORTANT:
// rename fib_model to text_model to have it work.
const CONTENT: &str = include_str!("../../static/assembly_examples/floating_point.asm");
const CONTENT: &str = include_str!("../../static/assembly_examples/riscv_test.asm");
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Can you add some sort of toggle to the interface so we can switch between RISC-V and MIPS modes? I don't really care who does it or where but it's something that we should probably have at this point.

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I put that there so the frontend would implement the toggle/dropdown as they wished.

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In that case, do you mind switching this back to a MIPS example just to make it a little easier to debug the rest of the program in the meantime?

const ARCH: Architecture = Architecture::RISCV;
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#[derive(Properties, Clone, PartialEq)]
struct AppProps {
Expand Down Expand Up @@ -122,7 +126,7 @@ fn app(props: &AppProps) -> Html {
let text_model = text_model.clone();
let memory_text_model = memory_text_model.clone();
// parses through the code to assemble the binary and retrieves programinfo for error marking and mouse hover
let (program_info, assembled) = parser(text_model.get_value());
let (program_info, assembled) = parser(text_model.get_value(), ARCH);
*program_info_ref.borrow_mut() = program_info.clone();
*binary_ref.borrow_mut() = assembled.clone();
pc_limit.set(assembled.len() * 4);
Expand Down Expand Up @@ -397,7 +401,7 @@ fn app(props: &AppProps) -> Html {
}

// Update the parsed info for text and data segment views
let (program_info, _) = parser(text_model.get_value());
let (program_info, _) = parser(text_model.get_value(), ARCH);
*program_info_ref.borrow_mut() = program_info;

trigger.force_update();
Expand Down
9 changes: 0 additions & 9 deletions src/parser/assembling.rs
Original file line number Diff line number Diff line change
Expand Up @@ -20,8 +20,6 @@ use std::collections::HashMap;

use super::parser_structs_and_enums::{RISCV_FP_REGISTERS, RISCV_GP_REGISTERS};

use gloo_console::log;

///This function takes an instruction whose operands it is supposed to read, the order of expected operand types and then
///the order these operands should be concatenated onto the binary representation of the string
///the function returns the instruction it was given with any errors and the binary of the operands added on.
Expand Down Expand Up @@ -229,7 +227,6 @@ pub fn read_operands_riscv(
//the binary is pushed to the string representations vec. Otherwise, the errors are pushed to the instruction.errors vec.
match operand_type {
RegisterGP => {
log!("RegisterGP");
instruction.operands[i].token_type = TokenType::RegisterGP;
bit_lengths.push(5);

Expand All @@ -239,8 +236,6 @@ pub fn read_operands_riscv(
GeneralPurpose,
);

log!("Register Results: ", format!("{:?}", register_results));

// Vector holding all register arguments
binary_representation.push(register_results.0 as u32);
if register_results.1.is_some() {
Expand All @@ -265,7 +260,6 @@ pub fn read_operands_riscv(
UpperImmediate =>
// Can be used to represent offsets for J-type instructions
{
log!("Upper Immediate");
instruction.operands[i].token_type = TokenType::Immediate;
bit_lengths.push(20); // 20 bits to represent upper immediates

Expand Down Expand Up @@ -552,9 +546,6 @@ pub fn read_memory_address_riscv(
let immediate_results = read_immediate(offset_str, start_end_columns, 16);
let register_results = read_register_riscv(&cleaned_base, start_end_columns, GeneralPurpose);

log!("Immediate: ", format!("{:?}", immediate_results));
log!("Register: ", format!("{:?}", register_results));

//any errors found in the read_immediate or read_register functions are collected into a vec
//if there were any errors, those are returned
let mut return_errors: Vec<Error> = Vec::new();
Expand Down
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