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Merge pull request #1222 from fpjentzsch/fix/tclstore QuicktestPRAgainstDev #1950: Commit a054165 pushed by auphelia
November 1, 2024 14:43 14m 48s dev
dev
November 1, 2024 14:43 14m 48s
[Container] Apply workaround for running multiple parallel Vivado instances QuicktestPRAgainstDev #1949: Pull request #1222 opened by fpjentzsch
November 1, 2024 11:41 14m 41s fpjentzsch:fix/tclstore
fpjentzsch:fix/tclstore
November 1, 2024 11:41 14m 41s
Analytical FIFO sizing QuicktestPRAgainstDev #1948: Pull request #1185 synchronize by lstasytis
October 29, 2024 23:49 14m 58s lstasytis:feature/analytical-fifo-sizing
lstasytis:feature/analytical-fifo-sizing
October 29, 2024 23:49 14m 58s
Pyxsi enablement for alternative rtl simulation QuicktestPRAgainstDev #1947: Pull request #1213 synchronize by auphelia
October 29, 2024 11:58 15m 48s feature/pyxsi_integration
feature/pyxsi_integration
October 29, 2024 11:58 15m 48s
Pyxsi enablement for alternative rtl simulation QuicktestPRAgainstDev #1946: Pull request #1213 synchronize by auphelia
October 29, 2024 11:55 15m 7s feature/pyxsi_integration
feature/pyxsi_integration
October 29, 2024 11:55 15m 7s
Pyxsi enablement for alternative rtl simulation QuicktestPRAgainstDev #1945: Pull request #1213 synchronize by auphelia
October 25, 2024 15:05 14m 58s feature/pyxsi_integration
feature/pyxsi_integration
October 25, 2024 15:05 14m 58s
Pyxsi enablement for alternative rtl simulation QuicktestPRAgainstDev #1944: Pull request #1213 synchronize by auphelia
October 25, 2024 10:49 15m 38s feature/pyxsi_integration
feature/pyxsi_integration
October 25, 2024 10:49 15m 38s
Merge pull request #1219 from Xilinx/feature/no_cache QuicktestPRAgainstDev #1943: Commit 45a4e4a pushed by auphelia
October 24, 2024 14:36 15m 12s dev
dev
October 24, 2024 14:36 15m 12s
Running docker build without cache QuicktestPRAgainstDev #1942: Pull request #1219 synchronize by auphelia
October 24, 2024 14:20 15m 57s feature/no_cache
feature/no_cache
October 24, 2024 14:20 15m 57s
Running docker build without cache QuicktestPRAgainstDev #1941: Pull request #1219 opened by auphelia
October 24, 2024 14:03 14m 27s feature/no_cache
feature/no_cache
October 24, 2024 14:03 14m 27s
Merge pull request #1217 from alexhornburg-xlnx/feature/build_custom_… QuicktestPRAgainstDev #1940: Commit dd0655b pushed by auphelia
October 24, 2024 10:03 15m 4s dev
dev
October 24, 2024 10:03 15m 4s
Merge pull request #1218 from Xilinx/dependabot/pip/onnx-1.17.0 QuicktestPRAgainstDev #1939: Commit 3d5eaac pushed by auphelia
October 24, 2024 09:54 15m 30s dev
dev
October 24, 2024 09:54 15m 30s
[Squeeze] Introduce Squeeze and Unsqueeze hardware operators QuicktestPRAgainstDev #1938: Pull request #1153 synchronize by preusser
October 24, 2024 09:45 14m 36s iksnagreb:feature/squeeze
iksnagreb:feature/squeeze
October 24, 2024 09:45 14m 36s
Bump onnx from 1.13.0 to 1.17.0 QuicktestPRAgainstDev #1937: Pull request #1218 synchronize by auphelia
October 24, 2024 09:33 14m 47s dependabot/pip/onnx-1.17.0
dependabot/pip/onnx-1.17.0
October 24, 2024 09:33 14m 47s
4-BIT DSP-MVU: Allow very wide lanes requiring even a high-lane extension. QuicktestPRAgainstDev #1936: Pull request #1203 synchronize by preusser
October 24, 2024 06:44 15m 2s tpreusse.mvu_harden
tpreusse.mvu_harden
October 24, 2024 06:44 15m 2s
[Infra] support passing arguments to build_custom flow QuicktestPRAgainstDev #1935: Pull request #1217 opened by alexhornburg-xlnx
October 23, 2024 16:55 14m 40s alexhornburg-xlnx:feature/build_custom_args
alexhornburg-xlnx:feature/build_custom_args
October 23, 2024 16:55 14m 40s
Pyxsi enablement for alternative rtl simulation QuicktestPRAgainstDev #1934: Pull request #1213 synchronize by auphelia
October 22, 2024 14:57 15m 27s feature/pyxsi_integration
feature/pyxsi_integration
October 22, 2024 14:57 15m 27s
Pyxsi enablement for alternative rtl simulation QuicktestPRAgainstDev #1933: Pull request #1213 synchronize by auphelia
October 22, 2024 14:56 15m 40s feature/pyxsi_integration
feature/pyxsi_integration
October 22, 2024 14:56 15m 40s
Pyxsi enablement for alternative rtl simulation QuicktestPRAgainstDev #1932: Pull request #1213 synchronize by auphelia
October 22, 2024 11:08 15m 25s feature/pyxsi_integration
feature/pyxsi_integration
October 22, 2024 11:08 15m 25s
Pyxsi enablement for alternative rtl simulation QuicktestPRAgainstDev #1931: Pull request #1213 synchronize by auphelia
October 22, 2024 09:37 15m 33s feature/pyxsi_integration
feature/pyxsi_integration
October 22, 2024 09:37 15m 33s
Pyxsi enablement for alternative rtl simulation QuicktestPRAgainstDev #1930: Pull request #1213 synchronize by auphelia
October 17, 2024 12:51 15m 16s feature/pyxsi_integration
feature/pyxsi_integration
October 17, 2024 12:51 15m 16s
Pyxsi enablement for alternative rtl simulation QuicktestPRAgainstDev #1929: Pull request #1213 synchronize by maltanar
October 17, 2024 10:00 15m 17s feature/pyxsi_integration
feature/pyxsi_integration
October 17, 2024 10:00 15m 17s
Pyxsi enablement for alternative rtl simulation QuicktestPRAgainstDev #1928: Pull request #1213 synchronize by auphelia
October 17, 2024 09:49 15m 7s feature/pyxsi_integration
feature/pyxsi_integration
October 17, 2024 09:49 15m 7s
Pyxsi enablement for alternative rtl simulation QuicktestPRAgainstDev #1927: Pull request #1213 synchronize by auphelia
October 17, 2024 09:46 16m 10s feature/pyxsi_integration
feature/pyxsi_integration
October 17, 2024 09:46 16m 10s
4-BIT DSP-MVU: Allow very wide lanes requiring even a high-lane extension. QuicktestPRAgainstDev #1926: Pull request #1203 synchronize by preusser
October 16, 2024 06:59 14m 50s tpreusse.mvu_harden
tpreusse.mvu_harden
October 16, 2024 06:59 14m 50s