Yosys 0.15
Yosys 0.14 .. Yosys 0.15
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Various
- clk2fflogic: nice names for autogenerated signals
- simulation include support for all flip-flop types.
- Added AIGER witness file co-simulation.
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Verilog
- Fixed evaluation of constant functions with variables or arguments with
reversed dimensions - Fixed elaboration of dynamic range assignments where the vector is
reversed or is not zero-indexed - Added frontend support for time scale delay values (e.g., #1ns)
- Fixed evaluation of constant functions with variables or arguments with
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SystemVerilog
- Added support for accessing whole sub-structures in expressions
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New commands and options
- Added glift command, used to create gate-level information flow tracking
(GLIFT) models by the "constructive mapping" approach
- Added glift command, used to create gate-level information flow tracking
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Verific support
- Ability to override default parser mode for verific -f command.