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Issues list

commone interface stl
#694 opened Sep 7, 2024 by neilwang0913
Broken Links
#687 opened Jun 13, 2024 by Subashkatel
Broken cache testbenches
#637 opened Jan 11, 2023 by BrendenPage
bsg_nonsynth_dramsim3 failing testbench bug Something isn't working
#622 opened Dec 16, 2022 by dpetrisko
Add code for FPGA side of bsg_link enhancement New feature or request
#609 opened Nov 15, 2022 by taylor-bsg
Document on how to add and simulate PLL to bsg_chip enhancement New feature or request
#570 opened May 29, 2022 by yunusdawji
long term change enhancement New feature or request
#545 opened Feb 7, 2022 by taylor-bsg
Should have comment explaining when to use scan here clarity Code readability or documentation issues
#537 opened Dec 19, 2021 by dpetrisko
Hardcoded address width in bsg_cache_to_dram_ctrl bug Something isn't working
#532 opened Dec 9, 2021 by dpetrisko
Should be yumi_o not ready_o
#517 opened Oct 27, 2021 by taylor-bsg
Small fifo hardened power consumption enhancement New feature or request
#512 opened Oct 21, 2021 by gaozihou
Multiple latches clarity Code readability or documentation issues enhancement New feature or request
#497 opened Sep 26, 2021 by dpetrisko
Force bsg_cache_dma cache line alignment enhancement New feature or request
#481 opened Aug 3, 2021 by dpetrisko
Move DMA memory modules to bsg_test enhancement New feature or request
#444 opened May 27, 2021 by mrutt92
Should be bsg_yumi_link? clarity Code readability or documentation issues
#427 opened Apr 15, 2021 by dpetrisko
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