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WIP: stm32 flash rework + ch32 flash rework and implementation #1642

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cae7a9a
riscv_debug: Begun building a scan handler for RISC-V debug v0.13 dev…
dragonmux Feb 8, 2023
c748c6a
riscv_debug: Created a stub for initialising a DMI
dragonmux Feb 8, 2023
9614e25
riscv_debug: Implemented a way to read/write the DTM control/status r…
dragonmux Feb 8, 2023
65fc898
riscv_debug: Moved the JTAG-specific DTM handler into the JTAG DTM im…
dragonmux Mar 21, 2023
cc6e1b3
riscv_debug: Implemented support for reading and dispatching the DTM …
dragonmux Feb 8, 2023
b811004
riscv_debug: Implemented reference counting and stub structures for t…
dragonmux Feb 8, 2023
ec31117
riscv_debug: Restructed riscv_dmi_init() and riscv_jtag_dtm_init() to…
dragonmux Feb 8, 2023
a0d04ad
riscv_debug: Handle the idle cycles component of the DTMCS register
dragonmux Feb 8, 2023
ef82b62
riscv_debug: Implemented a way to read the DMI address space
dragonmux Feb 8, 2023
f441709
riscv_debug: Implemented logic for iterating and discovering DMs
dragonmux Feb 8, 2023
322931c
riscv_debug: Begun implementing the hart enumeration process
dragonmux Feb 8, 2023
3d911d6
riscv_debug: Implemented enumeration of the harts associated with a DM
dragonmux Feb 8, 2023
9628555
riscv_debug: Implemented support for grabbing the hart's address bus …
dragonmux Feb 8, 2023
dbb7446
riscv_debug: Implemented halt and resume support in preparation for r…
dragonmux Feb 8, 2023
324ba8b
riscv_debug: Implemented readout of CSRs and reading the 4 hart ident…
dragonmux Feb 8, 2023
741a865
riscv_debug: Implemented readout of the ISA register to determine add…
dragonmux Feb 8, 2023
09d8c12
riscv_debug: Implemented the ability for riscv_reg_read() to do 128-,…
dragonmux Feb 9, 2023
d0fe0b3
riscv_debug: Implemented support for discovering the target Hart's IS…
dragonmux Feb 9, 2023
8a980e8
riscv_debug: Implemented writing to CSRs
dragonmux Feb 9, 2023
3d29e9a
riscv_debug: Created probe stubs for probing RISC-V 32- and 64-bit ta…
dragonmux Feb 9, 2023
6175aa2
riscv_debug: Set up the target designer code field
dragonmux Feb 9, 2023
abda4b1
riscv_debug: Documented the used CSR addresses
dragonmux Feb 9, 2023
43f90a5
riscv_debug: Implemented the ability to force a CSR access to a speci…
dragonmux Feb 9, 2023
c44d053
riscv_debug: Implemented single-stepping support in riscv_halt_resume()
dragonmux Feb 9, 2023
ee401eb
riscv_debug: Added definitions for the abstract memory access command
dragonmux Feb 9, 2023
6fc6d36
riscv_debug: Implemented arbitrary memory read
dragonmux Feb 9, 2023
e7b81ca
riscv_debug: Fixed the target hart not being halted during probing
dragonmux Feb 9, 2023
25d500f
riscv_debug: Added some DEBUG_TARGET information to the CSR functions…
dragonmux Feb 9, 2023
9f06826
riscv_debug: Implemented the target check_error hook
dragonmux Feb 9, 2023
1fca546
riscv_debug: Made more of the DM and hart machinary available in the …
dragonmux Feb 9, 2023
dab2cf1
riscv_debug: Moved the mem_read implementation into the bitness-speci…
dragonmux Feb 9, 2023
4b46d35
riscv_debug: Forced the vendor ID to be read 32-bit per the privilege…
dragonmux Feb 9, 2023
6948ff8
stm32f1: Implemented a probe routine for GD32VF1
dragonmux Feb 9, 2023
0feda26
riscv32: Implemented probing for the GD32VF1
dragonmux Feb 9, 2023
141b084
riscv_debug: Handle the rv128 case by complaining to the user we don'…
dragonmux Feb 9, 2023
50989dd
riscv_debug: Begun implementing attach/detach
dragonmux Feb 9, 2023
0b7ccee
riscv_debug: Populated target->cpuid and made use of it in gd32vf1_pr…
dragonmux Feb 9, 2023
dbcd0fb
riscv_debug: Implemented building the target description XML
dragonmux Feb 10, 2023
1ca5e44
riscv_debug: Implemented regs_read for both rv32 and rv64
dragonmux Feb 10, 2023
338d206
riscv_debug: Halt the hart we're looking at to on attach, and resume …
dragonmux Feb 10, 2023
402b677
riscv32: Added some better documentation for what various things do
dragonmux Feb 10, 2023
ca9bd0c
riscv64: Added some better documentation for what various things do
dragonmux Feb 10, 2023
28e26b3
riscv_debug: Fixed a couple of mistakes in the comments for riscv_dmi…
dragonmux Feb 10, 2023
2a36eee
riscv_debug: Implemented the target halt_poll hook
dragonmux Feb 10, 2023
4aad1b4
riscv_debug: Implemented discovery of the available "trigger" slots a…
dragonmux Feb 10, 2023
7db2ed3
riscv_debug: Implemented support machinary for being able to set watc…
dragonmux Feb 10, 2023
da69c70
riscv_debug: Added documentation on where to find the debug specs used
dragonmux Feb 10, 2023
e821868
riscv_debug: Implemented a translator for a breakwatch size to match …
dragonmux Feb 10, 2023
91bcc41
riscv32: Implemented the target breakwatch_set hook
dragonmux Feb 10, 2023
6267b84
riscv32: Implemented the target breakwatch_clear hook
dragonmux Feb 10, 2023
067526a
gdb_main: Added some comments to aid with understanding handle_z_pack…
dragonmux Feb 10, 2023
3ec8a74
stm32f1: Modified the Flash routines to work with GD32VF103 parts too
dragonmux Feb 11, 2023
c53a373
riscv_debug: Moved the part ID readout into its own function, fixing …
dragonmux Feb 11, 2023
71e8725
riscv_debug: Implemented target reset
dragonmux Feb 11, 2023
b5349fc
riscv_debug: Refactored out the DM state polling code into a new func…
dragonmux Feb 11, 2023
6483abf
riscv_debug: Implemented polling for reset succeeding and then acknow…
dragonmux Feb 11, 2023
5528a8d
riscv32: Improved the checks in riscv32_breakwatch_set() to avoid usi…
dragonmux Feb 11, 2023
840cbe6
riscv_debug: Cleaned up the nomenclature of riscv_halt_poll()'s halt …
dragonmux Feb 11, 2023
55d50a9
riscv_debug: Implemented regs_write for both rv32 and rv64
dragonmux Feb 11, 2023
84c7c53
riscv32: Implemented mem_write and a data packing helper
dragonmux Feb 11, 2023
96591ff
riscv_debug: Transform JTAG ID Code designer into JEP-106 internal fo…
perigoso Feb 19, 2023
3e667cd
riscv_debug: Fixed the vendor ID decode in riscv_hart_read_ids() to a…
dragonmux Mar 28, 2023
341a3b6
riscv_debug: Implemented poll timeouts for halt/resume
dragonmux Apr 1, 2023
df68a75
riscv: check if hw reset worked, if not do a DM reset
Aug 13, 2023
21b5b30
riscv: make sure the hart is stopped when exiting reset
Aug 15, 2023
6e1fd84
riscv: add single register access, add csr access with an offset, exp…
Aug 15, 2023
bf31956
fixup! riscv32: Implemented probing for the GD32VF1
perigoso Oct 3, 2023
e97c366
jtag_devs: Added the ESP32-C3's IDCode to the devices table
dragonmux Feb 13, 2023
48fe160
riscv_debug: Too wide a CSR access triggers a not-supported error on …
dragonmux Feb 13, 2023
c238e58
jep106: Added the manufacturer code for Espressif
dragonmux Feb 13, 2023
8d7ebaf
riscv_debug: Implemented DMI sticky error recovery
dragonmux Feb 13, 2023
3a85a6f
jtag_devs: Added IR quirks for the ESP32-C3
dragonmux Feb 14, 2023
bc80f18
riscv_jtag_dtm: Fixed riscv_shift_dmi() not implementing handling for…
dragonmux Mar 28, 2023
1f2f86a
riscv_debug: Added in some additional target-level logging in the DMI…
dragonmux Mar 28, 2023
7d63254
riscv_jtag_dtm: Adjusted riscv_jtag_dmi_write() with handling for RV_…
dragonmux Mar 28, 2023
094a493
esp32c3: Began implementing support and memory maps for the ESP32-C3
dragonmux Mar 28, 2023
4386684
esp32c3: Began the process of implementing support for the off-chip F…
dragonmux Mar 28, 2023
32669c3
riscv32: Refactored the memory access routines to allow a target to s…
dragonmux Mar 28, 2023
6eb56ce
riscv32: Moved the length check and target-level debugging for memory…
dragonmux Mar 28, 2023
055d744
riscv_debug: Implemented support for detecting and switching over to …
dragonmux Mar 28, 2023
47138f8
riscv_debug: Naming cleanup of the constants involved in abstract com…
dragonmux Mar 28, 2023
26dd2bd
riscv32: Implemented memory read via system bus
dragonmux Mar 28, 2023
94ae3ac
riscv32: Fixed riscv32_sysbus_mem_read() not checking the system bus …
dragonmux Mar 28, 2023
56eb6c0
riscv32: Implemented memory write via sytem bus
dragonmux Mar 28, 2023
edf1dc0
riscv_debug: Grabbed the supported system bus access widths in riscv_…
dragonmux Mar 29, 2023
5bab152
riscv32: Refactored out the native-width system bus access logic into…
dragonmux Mar 29, 2023
d07f802
riscv32: Implemented support for non-native-width system bus memory r…
dragonmux Mar 29, 2023
1c5aef0
riscv32: Added in a busy check to the native memory read loop to keep…
dragonmux Mar 29, 2023
471e7ed
riscv_debug: Added some insurance that the system bus is in a good st…
dragonmux Mar 30, 2023
2a195a8
esp32c3: Implemented support for performing SPI reads and reading out…
dragonmux Mar 31, 2023
10da94b
esp32c3: Improved the fallback path in esp32c3_add_flash() when the S…
dragonmux Mar 31, 2023
c6da1d0
riscv32: Added a loop to riscv32_sysbus_mem_write() to make sure each…
dragonmux Mar 31, 2023
2cb86c9
esp32c3: Implemented handling for chunking reads to handle the fact t…
dragonmux Mar 31, 2023
610509a
esp32c3: Implemented handling for disabling and restoring the WDTs so…
dragonmux Apr 1, 2023
f92ce46
riscv32: Refactored out the native-width system bus write logic into …
dragonmux Apr 1, 2023
98c9d63
riscv32: Implemented support for non-native-width system bus memory w…
dragonmux Apr 1, 2023
a1932c8
esp32c3: Implemented SPI write support and mass erase
dragonmux Apr 1, 2023
a73e3bb
esp32c3: Implemented a type for holding SPI Flash specific information
dragonmux Apr 1, 2023
6fecd3d
esp32c3: Implemented Flash erase
dragonmux Apr 1, 2023
3e11ae2
esp32c3: Implemented Flash write
dragonmux Apr 1, 2023
dbfc7e9
esp32c3: Added handling for correctly entering Flash mode
dragonmux Apr 2, 2023
d14ed5c
esp32c3: Implemented i-cache invalidation and reload for post-complet…
dragonmux Apr 3, 2023
38ffd3e
esp32c3: Improved the setup for esp32c3_spu_run_command()
dragonmux Apr 5, 2023
9b6a041
esp32c3: Refactored out the innards of esp32c3_spi_run_command() from…
dragonmux Apr 5, 2023
dc4925e
esp32c3: Improved our handling of chip select hold in esp32c3_spi_wri…
dragonmux Apr 5, 2023
8ebe4d3
esp32c3: Cleaned up the handling of the SPI1 misc register in esp32c3…
dragonmux Apr 6, 2023
971bfaa
esp32c3: Cleaned up and improved the data handling in esp32c3_spi_rea…
dragonmux Apr 6, 2023
82af43f
esp32c3: Hacky patch to make Flash write almost work correctly at the…
dragonmux Apr 6, 2023
fe722de
esp32c3: Switched errors over to using `DEBUG_ERROR` instead of abusi…
dragonmux Apr 15, 2023
93b7ab6
target/esp32c3: fix sfdp function signature
perigoso Aug 10, 2023
c0d6105
hosted: barebones wch-link implementation
perigoso Aug 10, 2023
192dfe8
buffer_utils: Implemented a big endian 32-bit write
perigoso Aug 11, 2023
6ea9e73
hosted/wchlink: implement DMI transfer
perigoso Aug 11, 2023
e5aa920
riscv_debug: expose DMI operation and status defines
perigoso Aug 11, 2023
5157ac5
jep106: add BMD internal flag
perigoso Jul 31, 2023
9882d33
jep106: add internal WCH non-jep106 code
perigoso Feb 23, 2023
3a4e1c2
riscv_jtag_dtm: move RV_DMI_TOO_SOON handling one level up
perigoso Aug 11, 2023
c769d53
hosted/wchlink: implement RISC-V DTM handler
perigoso Aug 11, 2023
46c944d
command: add rvswd scan routine command
perigoso Aug 11, 2023
baaef78
hosted/wchlink: implement RVSWD scan
perigoso Aug 11, 2023
f376556
riscv_debug: handle CH32V3x quirk
perigoso Aug 11, 2023
0f4392a
riscv32: add ch32v3 target probe
perigoso Feb 23, 2023
fbca4ba
!fixme! mass erase rework, drop after merge and rebase
perigoso Sep 7, 2023
531b85b
esp32c3: refactor with new mass erase target API
perigoso Sep 7, 2023
7e548c9
ch32vx: implement electronic signature (ESIG) register handling
perigoso Aug 11, 2023
147ea81
target/ch32f1: replace macros with functions
perigoso Aug 11, 2023
23e48eb
target/ch32f1: longer variable naming
perigoso Aug 11, 2023
4d13cc3
target/ch32f1: remove debug verify code
perigoso Aug 11, 2023
d357726
target/ch32f1: const correctness
perigoso Aug 11, 2023
18e9f01
!fixme! stm32 flash
perigoso Oct 5, 2023
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126 changes: 67 additions & 59 deletions src/Makefile
Original file line number Diff line number Diff line change
Expand Up @@ -23,65 +23,73 @@ ifeq ($(ENABLE_DEBUG), 1)
CFLAGS += -DENABLE_DEBUG
endif

SRC = \
adiv5.c \
adiv5_jtag.c \
adiv5_swd.c \
command.c \
cortex.c \
cortexa.c \
cortexm.c \
crc32.c \
efm32.c \
exception.c \
gdb_if.c \
gdb_main.c \
gdb_hostio.c \
gdb_packet.c \
gdb_reg.c \
hex_utils.c \
hc32l110.c \
imxrt.c \
jtag_devs.c \
jtag_scan.c \
lmi.c \
lpc_common.c \
lpc11xx.c \
lpc17xx.c \
lpc15xx.c \
lpc40xx.c \
lpc43xx.c \
lpc546xx.c \
lpc55xx.c \
kinetis.c \
main.c \
maths_utils.c \
morse.c \
msp432e4.c \
msp432p4.c \
nrf51.c \
nrf91.c \
nxpke04.c \
remote.c \
rp.c \
sam3x.c \
sam4l.c \
samd.c \
samx5x.c \
sfdp.c \
spi.c \
stm32f1.c \
ch32f1.c \
stm32f4.c \
stm32h5.c \
stm32h7.c \
stm32mp15.c \
stm32l0.c \
stm32l4.c \
stm32g0.c \
renesas.c \
target.c \
target_flash.c \
SRC = \
adiv5.c \
adiv5_jtag.c \
adiv5_swd.c \
command.c \
cortex.c \
cortexa.c \
cortexm.c \
crc32.c \
efm32.c \
esp32c3.c \
exception.c \
gdb_if.c \
gdb_main.c \
gdb_hostio.c \
gdb_packet.c \
gdb_reg.c \
hex_utils.c \
hc32l110.c \
imxrt.c \
jtag_devs.c \
jtag_scan.c \
lmi.c \
lpc_common.c \
lpc11xx.c \
lpc17xx.c \
lpc15xx.c \
lpc40xx.c \
lpc43xx.c \
lpc546xx.c \
lpc55xx.c \
kinetis.c \
main.c \
maths_utils.c \
morse.c \
msp432e4.c \
msp432p4.c \
nrf51.c \
nrf91.c \
nxpke04.c \
remote.c \
riscv32.c \
riscv64.c \
riscv_debug.c \
riscv_jtag_dtm.c \
rp.c \
sam3x.c \
sam4l.c \
samd.c \
samx5x.c \
sfdp.c \
spi.c \
stm32f1.c \
ch32_flash.c \
stm32_flash.c \
ch32f1x.c \
ch32v3x.c \
stm32f4.c \
stm32h5.c \
stm32h7.c \
stm32mp15.c \
stm32l0.c \
stm32l4.c \
stm32g0.c \
renesas.c \
target.c \
target_flash.c \
target_probe.c

ifeq (,$(filter all_platforms,$(MAKECMDGOALS)))
Expand Down
45 changes: 45 additions & 0 deletions src/command.c
Original file line number Diff line number Diff line change
Expand Up @@ -57,6 +57,7 @@ static bool cmd_help(target_s *t, int argc, const char **argv);

static bool cmd_jtag_scan(target_s *target, int argc, const char **argv);
static bool cmd_swd_scan(target_s *t, int argc, const char **argv);
static bool cmd_rvswd_scan(target_s *target, int argc, const char **argv);
static bool cmd_auto_scan(target_s *t, int argc, const char **argv);
static bool cmd_frequency(target_s *t, int argc, const char **argv);
static bool cmd_targets(target_s *t, int argc, const char **argv);
Expand Down Expand Up @@ -88,6 +89,7 @@ const command_s cmd_list[] = {
{"jtag_scan", cmd_jtag_scan, "Scan JTAG chain for devices"},
{"swd_scan", cmd_swd_scan, "Scan SWD interface for devices: [TARGET_ID]"},
{"swdp_scan", cmd_swd_scan, "Deprecated: use swd_scan instead"},
{"rvswd_scan", cmd_rvswd_scan, "Scan RVSWD for devices"},
{"auto_scan", cmd_auto_scan, "Automatically scan all chain types for devices"},
{"frequency", cmd_frequency, "set minimum high and low times: [FREQ]"},
{"targets", cmd_targets, "Display list of available targets"},
Expand Down Expand Up @@ -288,6 +290,49 @@ bool cmd_swd_scan(target_s *t, int argc, const char **argv)
return true;
}

bool cmd_rvswd_scan(target_s *target, int argc, const char **argv)
{
(void)target;
(void)argc;
(void)argv;

if (platform_target_voltage())
gdb_outf("Target voltage: %s\n", platform_target_voltage());

if (connect_assert_nrst)
platform_nrst_set_val(true); /* will be deasserted after attach */

bool scan_result = false;
volatile exception_s e;
TRY_CATCH (e, EXCEPTION_ALL) {
#if PC_HOSTED == 1
scan_result = bmda_rvswd_scan();
#else
scan_result = false;
#endif
}
switch (e.type) {
case EXCEPTION_TIMEOUT:
gdb_outf("Timeout during scan. Is target stuck in WFI?\n");
break;
case EXCEPTION_ERROR:
gdb_outf("Exception: %s\n", e.msg);
break;
}

if (!scan_result) {
platform_target_clk_output_enable(false);
platform_nrst_set_val(false);
gdb_out("RVSWD scan failed!\n");
return false;
}

cmd_targets(NULL, 0, NULL);
platform_target_clk_output_enable(false);
morse(NULL, false);
return true;
}

bool cmd_auto_scan(target_s *t, int argc, const char **argv)
{
(void)t;
Expand Down
3 changes: 3 additions & 0 deletions src/gdb_main.c
Original file line number Diff line number Diff line change
Expand Up @@ -722,10 +722,13 @@ static void handle_z_packet(char *packet, const size_t plen)
else
ret = target_breakwatch_clear(cur_target, type, addr, len);

/* If the target handler was unable to set/clear the break/watch-point, return an error */
if (ret < 0)
gdb_putpacketz("E01");
/* If the handler does not support the kind requested, return empty string */
else if (ret > 0)
gdb_putpacketz("");
/* Otherwise let GDB know that everything went well */
else
gdb_putpacketz("OK");
}
Expand Down
8 changes: 8 additions & 0 deletions src/include/buffer_utils.h
Original file line number Diff line number Diff line change
Expand Up @@ -51,6 +51,14 @@ static inline void write_le4(uint8_t *const buffer, const size_t offset, const u
buffer[offset + 3U] = (value >> 24U) & 0xffU;
}

static inline void write_be4(uint8_t *const buffer, const size_t offset, const uint32_t value)
{
buffer[offset + 0U] = (value >> 24U) & 0xffU;
buffer[offset + 1U] = (value >> 16U) & 0xffU;
buffer[offset + 2U] = (value >> 8U) & 0xffU;
buffer[offset + 3U] = value & 0xffU;
}

static inline uint16_t read_le2(const uint8_t *const buffer, const size_t offset)
{
return buffer[offset + 0U] | ((uint16_t)buffer[offset + 1U] << 8U);
Expand Down
2 changes: 2 additions & 0 deletions src/include/target.h
Original file line number Diff line number Diff line change
Expand Up @@ -37,6 +37,7 @@ typedef struct target_controller target_controller_s;
#if PC_HOSTED == 1
bool bmda_swd_scan(uint32_t targetid);
bool bmda_jtag_scan(void);
bool bmda_rvswd_scan(void);
#endif
bool adiv5_swd_scan(uint32_t targetid);
bool jtag_scan(void);
Expand All @@ -63,6 +64,7 @@ bool target_mem_access_needs_halt(target_s *target);
bool target_flash_erase(target_s *target, target_addr_t addr, size_t len);
bool target_flash_write(target_s *target, target_addr_t dest, const void *src, size_t len);
bool target_flash_complete(target_s *target);
bool target_flash_mass_erase(target_s *target);

/* Register access functions */
size_t target_regs_size(target_s *target);
Expand Down
1 change: 1 addition & 0 deletions src/platforms/hosted/Makefile.inc
Original file line number Diff line number Diff line change
Expand Up @@ -126,6 +126,7 @@ ifneq ($(HOSTED_BMP_ONLY), 1)
SRC += bmp_libusb.c stlinkv2.c stlinkv2_jtag.c stlinkv2_swd.c
SRC += ftdi_bmp.c ftdi_jtag.c ftdi_swd.c
SRC += jlink.c jlink_jtag.c jlink_swd.c
SRC += wchlink.c wchlink_rvswd.c wchlink_riscv_dtm.c
else
SRC += bmp_serial.c
endif
Expand Down
3 changes: 2 additions & 1 deletion src/platforms/hosted/bmp_libusb.c
Original file line number Diff line number Diff line change
Expand Up @@ -74,6 +74,7 @@ static const debugger_device_s debugger_devices[] = {
{VENDOR_ID_STLINK, PRODUCT_ID_STLINKV3, PROBE_TYPE_STLINK_V2, NULL, "ST-Link v3"},
{VENDOR_ID_STLINK, PRODUCT_ID_STLINKV3E, PROBE_TYPE_STLINK_V2, NULL, "ST-Link v3E"},
{VENDOR_ID_SEGGER, PRODUCT_ID_ANY, PROBE_TYPE_JLINK, NULL, "Segger JLink"},
{VENDOR_ID_WCH, PRODUCT_ID_WCHLINK_RV, PROBE_TYPE_WCHLINK, NULL, "WCH-Link"},
{VENDOR_ID_FTDI, PRODUCT_ID_FTDI_FT2232, PROBE_TYPE_FTDI, NULL, "FTDI FT2232"},
{VENDOR_ID_FTDI, PRODUCT_ID_FTDI_FT4232, PROBE_TYPE_FTDI, NULL, "FTDI FT4232"},
{VENDOR_ID_FTDI, PRODUCT_ID_FTDI_FT232, PROBE_TYPE_FTDI, NULL, "FTDI FT232"},
Expand All @@ -99,7 +100,7 @@ const debugger_device_s *get_debugger_device_from_vid_pid(const uint16_t probe_v
void bmp_ident(bmda_probe_s *info)
{
DEBUG_INFO("Black Magic Debug App " FIRMWARE_VERSION "\n for Black Magic Probe, ST-Link v2 and v3, CMSIS-DAP, "
"J-Link and FTDI (MPSSE)\n");
"J-Link, FTDI (MPSSE) and WCH-Link\n");
if (info && info->vid && info->pid) {
DEBUG_INFO("Using %04x:%04x %s %s\n %s %s\n", info->vid, info->pid,
(info->serial[0]) ? info->serial : NO_SERIAL_NUMBER, info->manufacturer, info->product, info->version);
Expand Down
24 changes: 24 additions & 0 deletions src/platforms/hosted/platform.c
Original file line number Diff line number Diff line change
Expand Up @@ -50,6 +50,7 @@
#include "stlinkv2.h"
#include "ftdi_bmp.h"
#include "jlink.h"
#include "wchlink.h"
#include "cmsis_dap.h"
#endif

Expand Down Expand Up @@ -148,6 +149,11 @@ void platform_init(int argc, char **argv)
if (!jlink_init())
exit(1);
break;

case PROBE_TYPE_WCHLINK:
if (!wchlink_init())
exit(-1);
break;
#endif

default:
Expand Down Expand Up @@ -269,6 +275,21 @@ bool bmda_jtag_init(void)
}
}

bool bmda_rvswd_scan()
{
bmda_probe_info.is_jtag = false;

switch (bmda_probe_info.type) {
#if HOSTED_BMP_ONLY == 0
case PROBE_TYPE_WCHLINK:
return wchlink_rvswd_scan();
#endif

default:
return false;
}
}

void bmda_adiv5_dp_init(adiv5_debug_port_s *const dp)
{
switch (bmda_probe_info.type) {
Expand Down Expand Up @@ -334,6 +355,9 @@ char *bmda_adaptor_ident(void)
case PROBE_TYPE_JLINK:
return "J-Link";

case PROBE_TYPE_WCHLINK:
return "WCH-Link";

default:
return NULL;
}
Expand Down
8 changes: 7 additions & 1 deletion src/platforms/hosted/platform.h
Original file line number Diff line number Diff line change
Expand Up @@ -77,13 +77,19 @@ void platform_buffer_flush(void);
#define VENDOR_ID_ORBCODE 0x1209U
#define PRODUCT_ID_ORBTRACE 0x3443U

#define VENDOR_ID_WCH 0x1a86U
#define PRODUCT_ID_WCHLINK_RV 0x8010U /* WCH-Link and WCH-LinkE in mode RV */
#define PRODUCT_ID_WCHLINK_DAP 0x8011U /* WCH-Link in mode DAP */
#define PRODUCT_ID_WCHLINKE_DAP 0x8012U /* WCH-LinkE in mode DAP */

typedef enum probe_type {
PROBE_TYPE_NONE = 0,
PROBE_TYPE_BMP,
PROBE_TYPE_STLINK_V2,
PROBE_TYPE_FTDI,
PROBE_TYPE_CMSIS_DAP,
PROBE_TYPE_JLINK
PROBE_TYPE_JLINK,
PROBE_TYPE_WCHLINK,
} probe_type_e;

void gdb_ident(char *p, int count);
Expand Down
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