Update package with dequantization parameters
reviewdog [verible-verilog-lint] report
reported by reviewdog 🐶
Findings (10)
rtl/redmule_w_buffer.sv|20 col 46| Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
rtl/redmule_w_buffer.sv|61 col 40| All generate block labels must start with g_ or gen_ [Style: generate-constructs] [generate-label-prefix]
rtl/redmule_w_buffer.sv|71 col 34| Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
rtl/redmule_w_buffer.sv|85 col 4| Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
rtl/redmule_w_buffer.sv|155 col 45| Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
rtl/redmule_w_buffer.sv|220 col 40| All generate block labels must start with g_ or gen_ [Style: generate-constructs] [generate-label-prefix]
rtl/redmule_x_buffer.sv|32 col 79| Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
rtl/redmule_x_buffer.sv|89 col 38| Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
rtl/redmule_x_buffer.sv|108 col 28| Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
rtl/redmule_pkg.sv|102 col 52| Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
Filtered Findings (0)
Annotations
Check warning on line 20 in rtl/redmule_w_buffer.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] rtl/redmule_w_buffer.sv#L20
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
Raw output
message:"Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]" location:{path:"rtl/redmule_w_buffer.sv" range:{start:{line:20 column:46}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"} suggestions:{range:{start:{line:20 column:46} end:{line:21}} text:" localparam int unsigned D = DW/BITW\n"}
Check warning on line 61 in rtl/redmule_w_buffer.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] rtl/redmule_w_buffer.sv#L61
All generate block labels must start with g_ or gen_ [Style: generate-constructs] [generate-label-prefix]
Raw output
message:"All generate block labels must start with g_ or gen_ [Style: generate-constructs] [generate-label-prefix]" location:{path:"rtl/redmule_w_buffer.sv" range:{start:{line:61 column:40}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}
Check warning on line 71 in rtl/redmule_w_buffer.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] rtl/redmule_w_buffer.sv#L71
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
Raw output
message:"Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]" location:{path:"rtl/redmule_w_buffer.sv" range:{start:{line:71 column:34}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"} suggestions:{range:{start:{line:71 column:34} end:{line:72}} text:" .N_INPUTS ( N_REGS + 1 )\n"}
Check warning on line 85 in rtl/redmule_w_buffer.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] rtl/redmule_w_buffer.sv#L85
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
Raw output
message:"Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]" location:{path:"rtl/redmule_w_buffer.sv" range:{start:{line:85 column:4}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"} suggestions:{range:{start:{line:85 column:4} end:{line:86}} text:"end\n"}
Check warning on line 155 in rtl/redmule_w_buffer.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] rtl/redmule_w_buffer.sv#L155
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
Raw output
message:"Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]" location:{path:"rtl/redmule_w_buffer.sv" range:{start:{line:155 column:45}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"} suggestions:{range:{start:{line:155 column:45} end:{line:156}} text:"// Each row of the buffer has a counter that\n"}
Check warning on line 220 in rtl/redmule_w_buffer.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] rtl/redmule_w_buffer.sv#L220
All generate block labels must start with g_ or gen_ [Style: generate-constructs] [generate-label-prefix]
Raw output
message:"All generate block labels must start with g_ or gen_ [Style: generate-constructs] [generate-label-prefix]" location:{path:"rtl/redmule_w_buffer.sv" range:{start:{line:220 column:40}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"}
Check warning on line 32 in rtl/redmule_x_buffer.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] rtl/redmule_x_buffer.sv#L32
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
Raw output
message:"Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]" location:{path:"rtl/redmule_x_buffer.sv" range:{start:{line:32 column:79}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"} suggestions:{range:{start:{line:32 column:79} end:{line:33}} text:" output logic next_wrow_ready_o\n"}
Check warning on line 89 in rtl/redmule_x_buffer.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] rtl/redmule_x_buffer.sv#L89
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
Raw output
message:"Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]" location:{path:"rtl/redmule_x_buffer.sv" range:{start:{line:89 column:38}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"} suggestions:{range:{start:{line:89 column:38} end:{line:90}} text:" .N_INPUTS ( TOT_DEPTH )\n"}
Check warning on line 108 in rtl/redmule_x_buffer.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] rtl/redmule_x_buffer.sv#L108
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
Raw output
message:"Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]" location:{path:"rtl/redmule_x_buffer.sv" range:{start:{line:108 column:28}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"} suggestions:{range:{start:{line:108 column:28} end:{line:109}} text:" .N_INPUTS ( 1 )\n"}
Check warning on line 102 in rtl/redmule_pkg.sv
github-actions / verible-verilog-lint
[verible-verilog-lint] rtl/redmule_pkg.sv#L102
Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]
Raw output
message:"Remove trailing spaces. [Style: trailing-spaces] [no-trailing-spaces]" location:{path:"rtl/redmule_pkg.sv" range:{start:{line:102 column:52}}} severity:WARNING source:{name:"verible-verilog-lint" url:"https://github.com/chipsalliance/verible"} suggestions:{range:{start:{line:102 column:52} end:{line:103}} text:" parameter int unsigned GIDX_ADDR = 19; // 0x4C\n"}