Update readme.adoc

Adding note that svadu has been merged into the privileged spec. Signed-off-by: Bill Traynor <[email protected]>
riscvarchive · Mar 21, 2024 · 43e9afd · 43e9afd
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+[NOTE]
+====
+Hardware Updating of PTE A/D Bits (Svadu) has been merged into the Privileged Specification.  Please log any issues against the link:https://github.com/riscv/riscv-isa-manual[RISC-V ISA Manual] repository.
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 = RISC-V Hardware Updating of PTE A/D Bits
 
 The Svadu extension adds support and CSR control for hardware updating of PTE A/D bits.